Behavioral modeling of the IGBT using the Hammerstein configuration

The Hammerstein model configuration, which includes a nonlinear static block followed by a linear dynamic block, is applied to model the static and dynamic characteristics of the insulated gate bipolar transistor (IGBT). Using least-squares methods, the parameters in the behavioral model can be extracted from the electrical measurements of physical devices or from the circuit simulations of physics-based models. A single set of extracted parameters has been found to yield satisfactory efficiency and accuracy for the tested hard- and soft-switched converters under prescribed ranges of operating conditions     

Linearity and power characteristics of SiGe HBTs at high temperatures for RF applications

In this paper, the power gain, power-added efficiency (PAE) and linearity of power SiGe heterojunction-bipolar transistors at various temperatures have been presented. The power characteristics were measured using a two-tone load-pull system. For transistors biased with fixed base voltage, the small-signal power gain and PAE of the devices increase with increasing temperature at low base voltages, while they decrease at high base voltages. Besides, the linearity is improved at high temperature for all voltage biases. However, for devices with fixed collector current, the small-signal power gain, PAE, and linearity are nearly unchanged with temperature. The temperature dependence of power and linearity characteristics can be understood by analyzing the cutoff frequency, the collector current, Kirk effect and nonlinearities of transconductance at different temperatures.     

The impacts of high tensile stress CESL and geometry design on device performance and reliability for 90 nm SOI nMOSFETs

The thickness effects of high-tensile-stress contact etch stop layer (HS CESL) and impact of layout geometry (length of diffusion and gate width) on mobility enhancement of 100/(100) 90 nm SOI nMOSFETs were studied in detail. Additionally, we also inspected the low frequency characteristic with low-frequency noise investigation for FB-SOI nMOSFETs. Experimental results show that devices with 1100 Å HS CESL possess worse characteristics and hot-carrier-induced degradations than devices with 700 Å HS CESL due to serious stress-induced defects happen. The lower plateau of Lorentzian noise spectrum observed from input-referred voltage noise (S_vg) implies higher leakage current for the devices with 1100 Å HS CESL. On the other hand, we found that devices with narrow gate widths possess higher driving capacity because of larger fringing electric fields and higher compressive stress in direction perpendicular to the channel. Owing to the more serious impact of compressive stress in direction parallel to the channel, the device performance was degraded particularly for devices with shorter LOD.     

Implementation of high-coupling and broadband transformer in RFCMOS technology

This paper proposes a structure for transformer with high-coupling, broadband, and small chip area characteristics using current silicon-based technology. The proposed device has tight coupling (k=0.92), wide bandwidth (f/sub SR/=30.8 GHz), and minimum chip area (OD=140 /spl mu/m). Furthermore, the analytical formula for calculating mutual inductance is derived in this study; experimental results indicate that the analytical formula is feasible. The proposed transformer will be useful in designing high-performance RF integrated circuits for wireless applications.     

A Novel Character Segmentation Method for Text Images Captured by Cameras

Due to the rapid development of mobile devices equipped with cameras, instant translation of any text seen in any context is possible. Mobile devices can serve as a translation tool by recognizing the texts presented in the captured scenes. Images captured by cameras will embed more external or unwanted effects which need not to be considered in traditional optical character recognition (OCR). In this paper, we segment a text image captured by mobile devices into individual single characters to facilitate OCR kernel processing. Before proceeding with character segmentation, text detection and text line construction need to be performed in advance. A novel character segmentation method which integrates touched character filters is employed on text images captured by cameras. In addition, periphery features are extracted from the segmented images of touched characters and fed as inputs to support vector machines to calculate the confident values. In our experiment, the accuracy rate of the proposed character segmentation system is 94.90%, which demonstrates the effectiveness of the proposed method.     

Optimization of an RFID location identification scheme based on the neural network

An indoor localization technology is increasingly critical as location‐aware applications evolve. Researchers have proposed several indoor localization technologies. Because most of the proposed indoor localization technologies simply involve using the received signal strength indicator value of radio‐frequency identification (RFID) for indoor localization, radio‐frequency interference, and environmental factors often limit the accuracy of localization results. Therefore, this study proposes an accurate RFID localization based on the neural network (ARL‐N²), a passive RFID indoor localization scheme for identifying tag positions in a room, combining a location identification based on dynamic active RFID calibration algorithm with a backpropagation neural network (BPN). The proposed scheme composed of two phases: in the training phase, an appropriate BPN architecture is constructed using the training data derived from the coordinates of reference tags and the coordinates obtained using the localization algorithm. By contrast, the online phase involves calculating the tracking tag coordinates and using these values as BPN inputs, thereby enhancing the estimated location. A performance evaluation of the ARL‐N² schemes confirms its high localization accuracy. The proposed method can be used to locate critical objects in difficult‐to‐find areas by creating minimal errors and applying and economical technique. Copyright © 2013 John Wiley & Sons, Ltd.     

A new shared AWG-based OCDMA scheme implemented with time-spreading and wavelength-group-hopping embedded M-sequence code

This paper exploits the inherent cyclic and periodic free-spectral-range (FSR) properties of arrayed-waveguide grating (AWG) routers to construct a two-dimensional (2D) time-spreading and wavelength-group-hopping embedded M-sequence code for optical multiple-access networks. In the proposed codecs (encoder/decoder), a fine arrayed-waveguide grating (AWG) is used to generate an M-sequence code pattern, which is then spread in the wavelength domain by multiple coarse AWGs. The signals produced at the output ports of the coarse AWGs are then spread in the time domain using optical delay lines. The 2D code is evaluated in terms of its correlation, bit-error-rate (BER) and cardinality characteristics. It is shown that the TS/GH embedded M-sequence code yields a significant improvement in both the BER and cardinality performance of the optical multiple-access networks compared to that obtained using conventional prime-hop code (PHC), modified prime-hop code (MPHC), Barker and Walsh-based bipolar–bipolar sequence.     

InGaP/GaAs0.94Sb0.06/GaAs doubleheterojunction bipolar transistor

A novel InGaP/GaAs_0.94Sb_0.06/GaAs double heterojunction bipolar transistor is presented. It features the use of fully strained pseudomorphic GaAs_0.94Sb_0.06 as the base layer and an InGaP layer as the emitter, which both eliminate misfit dislocations and current blocking, and increase the valence band discontinuity at the InGaP/GaAsSb interface. The device demonstrates a high current gain and a low turn-on voltage     

Platform-Based MPEG-4 SOC Design for Video Communications

An MPEG-4 video coding SOC design is presented in this paper. We adopt platform-based architecture with an embedded RISC core and efficient memory organization. A motion estimator supporting predictive diamond search and spiral full search is implemented for compromise between compression performance and design cost. The proposed data reuse scheme reduces required memory access bandwidth. For texture coding path, an interleaving DCT/IDCT scheduling with substructure sharing technique is proposed. Several key modules are integrated into an efficient platform in hardware/software co-design fashion. The cost-efficient video encoder SOC consumes 256.8 mW at 40 MHz and achieves real-time encoding of 30 CIF (352×288) frames per second. Yung-Chi Chang was born in Kaohsiung, Taiwan, R.O.C., in 1975. He received the B.S. and M.S. degrees from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C., in 1998 and 2000, respectively, where he is currently pursuing the Ph.D. degree in the Graduate Institute of Electrical Engineering. His research interests include video coding algorithms and VLSI architectures for image/video processing. Wei-Min Chao was born in Taoyuan, Taiwan, R.O.C., in 1977. He received the B.S. and M.S. degrees from the Department of Electronics Engineering, National Taiwan University in 2000 and 2002 separately. His research interests include video coding algorithms and VLSI architecture for image and video processing. Chih-Wei Hsu was born in Taipei, Taiwan, in 1979. He received the B.S.E.E and M.S.E.E degrees from National Taiwan University (NTU), Taipei, in 2001 and 2003, respectively. He joined MediaTek, Inc., Hsinchu, Taiwan, in 2003, where he develops integrated circuits related to multimedia systems and optical storage devices. His research interests include object tracking, video coding, baseband signal processing, and VLSI design. Liang-Gee Chen was born in Yun-Lin, Taiwan, in 1956. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, in 1979, 1981, and 1986, respectively. He was an Instructor (1981-1986), and an Associate Professor (1986-1988) in the Department of Electrical Engineering, National Cheng Kung University. In the military service during 1987 to 1988, he was an Associate Professor in the Institute of Resource Management, Defense Management College. In 1988, he joined the Department of Electrical Engineering, National Taiwan University. During 1993 to 1994 he was a Visiting Consultant of DSP Research Department, AT & T Bell Lab, Murray Hill. In 1997, he was a visiting scholar of the Department of Electrical Engineering, University of Washington, Seattle. During 2001 to 2004, he was the first director of the Graduate Institute of Electronics Engineering (GIEE) in National Taiwan University (NTU). Currently, he is a Professor of the Department of Electrical Engineering and GIEE in NTU, Taipei, Taiwan. He is also the director of the Electronics Research and Service Organization in Industrial Technology Research Institute, Hsinchu, Taiwan. His current research interests are DSP architecture design, video processor design, and video coding systems. Dr. Chen has served as an Associate Editor of IEEE Transactions on Circuits and Systems for Video Technology since 1996, as Associate Editor of IEEE Transactions on VLSI Systems since 1999, and as Associate Editor of IEEE Transactions on Circuits and Systems II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the Proceedings of the IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001--2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi.     

采用反射式液晶显示器和有机电致发光器件前后双置组合而成的高环境对比度显示器

一种高环境对比度(A-CR)和大开口率的显示器已经从理论上证明,并通过把一个正常显黑反射型显示器(NB-RLCD)和一个有机电致发光器件(OLED)堆垛的实验加以证明。这种前后双置(以下称为tandem型)的器件组合可以分别在明亮或昏暗的环境下切换NB-RLCD模式或OLED模式。RLCD的正常显黑特性也可以提升OLED模式工作时的A-CR性能。为了在RLCD模式下获得更好的图像品质,一个复杂并且具有传输功能的结构被用于消除镜面反射和提高可视角至CR﹥2:1超过55°的锥面可视角度。另外,这样的结构也可以提高OLED49.4%的表面量子效率。在我们的实验里,忽略环境亮度因素并使A-CR保持在100:1以上。