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991.
To increase carrier confinement, the GaN barrier layer was substituted with an AlInGaN quaternary barrier layer which was lattice-matched to GaN in the GaN-InGaN multiple quantum wells (MQWs). Photoluminescence (PL) and high-resolution X-ray diffraction measurements showed that the AlInGaN barrier layer has a higher bandgap energy than the originally used GaN barrier layer. The PL intensity of the five periods of AlInGaN-InGaN MQWs was increased by three times compared to that of InGaN-GaN MQWs. The electroluminescence (EL) emission peak of AlInGaN-InGaN MQWs ultraviolet light-emitting diode (UV LED) was blue-shifted, compared to a GaN-InGaN MQWs UV LED and the integrated EL intensity of the AlInGaN-InGaN MQWs UV LED increased linearly up to 100 mA. These results indicated that the AlInGaN-InGaN MQWs UV LED has a stronger carrier confinement than a GaN-InGaN MQWs UV LED due to the larger barrier height of the AlInGaN barrier layer compared to a GaN barrier layer.  相似文献   
992.
The selective wet etching of a p-GaN layer by using a solution of KOH in ethylene glycol (KE) was studied to enhance the optical and electrical performance of the GaN-based light-emitting diodes (LEDs). The surface of the p-GaN, which was selectively etched in the KE solution, showed hexagonal-shaped etch pits. The light-output power of etched LEDs was improved by 29.4% compared to that of the nonetched LED. This improvement was attributed to the increase in the probability of photons to escape due to the increased surface area of textured surface and the reduction in contact resistance of the ohmic layer resulting from the increased contact area and hole concentration on the textured p-GaN. The reverse leakage current of the LED was also greatly decreased due to the surface passivation and the removal of defective regions from the p-GaN.  相似文献   
993.
We have demonstrated high-performance InGaN-GaN multiple quantum-wells light-emitting diodes (LEDs) using polarization-induced (PI) p-InGaN-GaN superlattice. Electrical measurements show that PI LEDs produce much lower series resistance and turn-on voltage (at 20 mA) as compared to those of normal LEDs without the superlattice. It is also shown that the output power and photon wavelength of the PI LEDs remain electrically stable up to a high stress region of 200 mA. However, those of normal LEDs become electrically and optically degraded in excess of 120 mA. These results show that the use of the PI effect is very effective to the improvement of the electrical properties of LEDs.  相似文献   
994.
A new high performance series-resonance energy-recovery circuit (ERC) for a plasma display panel (PDP) is proposed. Two different ERCs are used for both sides of the PDP, and the slow falling and fast rising times are employed. Therefore, it features the zero voltage switching, low electromagnetic interference, low current stress, no severe voltage notch, and high energy-recovery capability.  相似文献   
995.
We propose an advanced structure of optical subassembly (OSA) for packaging of the vertical-cavity surface-emitting laser (VCSEL) array, using (111) facet mirror of the V-groove ends formed in a silicon optical bench (SiOB) and angled fiber apertures. The feature of our OSA can provide a low optical crosstalk between neighboring channels, a low feedback reflection, and a large misalignment tolerance along the V-groove. We describe the optimized design of fiber angle, VCSEL position, and fiber position. The fabricated OSA structure consists of 12 channels of angled fiber array, 54.7/spl deg/ V-grooves, Au-coated mirrors on (111) end facet of the V-grooves, and flip-chip-bonded VCSEL array on a SiOB. In this structure, the beam emitted from the VCSEL is deflected at the 54.7/spl deg/ mirror of (111) end facet and propagated into the angled fiber. The angled fiber array was polished by 57/spl deg/. Fabricated OSAs showed a coupling efficiency of 30%-50% that is 25 times larger than that obtained from an OSA with a vertically flat fiber array. Our OSA showed large misalignment tolerance of about 90 /spl mu/m along the longitudinal direction in the V-groove. We fabricated a parallel optical transmitter module using the OSA and demonstrated 12 channels /spl times/2.5 Gb/s data transmission with a clear eye diagram.  相似文献   
996.
The signal via is a heavily utilized interconnection structure in high-density System-on-Package (SoP) substrates and printed circuit boards (PCBs). Vias facilitate complicated routings in these multilayer structures. Significant simultaneous switching noise (SSN) coupling occurs through the signal via transition when the signal via suffers return current interruption caused by reference plane exchange. The coupled SSN decreases noise and timing margins of digital and analog circuits, resulting in reduction of achievable jitter performance, bit error ratio (BER), and system reliability. We introduce a modeling method to estimate SSN coupling based on a balanced transmission line matrix (TLM) method. The proposed modeling method is successfully verified by a series of time-domain and frequency-domain measurements of several via transition structures. First, it is clearly verified that SSN coupling causes considerable clock waveform distortion, increases jitter and noise, and reduces margins in pseudorandom bit sequence (PRBS) eye patterns. We also note that the major frequency spectrum component of the coupled noise is one of the plane pair resonance frequencies in the PCB power/ground pair. Furthermore, we demonstrate that the amount of SSN noise coupling is strongly dependent not only on the position of the signal via, but also on the layer configuration of the multilayer PCB. Finally, we have successfully proposed and confirmed a design methodology to minimize the SSN coupling based on an optimal via positioning approach.  相似文献   
997.
The authors present an analysis of the effect of timing offset on channel estimation for comb-type pilot-aided orthogonal frequency division multiplexing (OFDM) systems. Residual timing offset does not negatively affect the channel estimation of the pilot subcarrier, but does corrupt the channel information obtained via interpolation. This paper provides the mean square error (MSE) channel estimation performance when a linear interpolation technique is used in a comb-type pilot-aided OFDM system. Analysis shows that the performance degradation of the channel estimator due to imperfect frame synchronization is dependent on the frequency correlation of the channels and the amount of timing offset  相似文献   
998.
The effect of Pd on the growth rate of metal-induced lateral crystallization (MILC) from Ni seed and the electrical properties of thin-film transistors (TFTs) fabricated on the films crystallized by MILC were investigated. When the Pd metal is placed on the amorphous-silicon/Ni-seed layer, the MILC growth rate is two to three times faster than that of conventional Ni-MILC, without any degradation of TFTs. These results were explained by a stress that is generated by the formation of Pd2Si  相似文献   
999.
We proposed and experimentally demonstrated the reflective semiconductor optical amplifier (RSOA)-based wavelength-division-multiplexed passive optical network (WDM-PON) scheme where not only up/downlink data services but also broadcasting service could be provided using a single optical source. In the proposed scheme, the digital signal and subcarrier multiplexing (SCM) signal for downstream were simultaneously modulated by a single distributed feedback laser diode and RSOA in optical network unit remodulated downstream source as an upstream. Without performance deterioration of digital signals both in up- and downstream, the proposed WDM-PON scheme can stably offer the SCM signal for broadcasting service. In the experiment, 1-Gb/s digital signals both for up- and downstream and 20-Mb/s SCM signal at 2.2 GHz for broadcasting were demonstrated in 10-km bidirectional link  相似文献   
1000.
A 32-bit fixed-point logarithmic arithmetic unit is proposed for the possible application to mobile three-dimensional (3-D) graphics system. The proposed logarithmic arithmetic unit performs division, reciprocal, square-root, reciprocal-square-root and square operations in two clock cycles and powering operation in four clock cycles. It can program its number range for accurate computation flexibility of 3-D graphics pipeline and eight -region piecewise linear approximation model for logarithmic and antilogarithmic conversion to reduce the operation error under 0.2%. Its test chip is implemented by 1-poly 6-metal 0.18-mum CMOS technology with 9-k gates. It operates at the maximum frequency of 231 MHz and consumes 2.18 mW at 1.8-V supply  相似文献   
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