Novel frame buffer pixel circuits for liquid-crystal-on-silicon microdisplays

A 32 /spl times/ 16 liquid-crystal-on-silicon (LCOS) backplane with novel frame buffer pixels is designed and fabricated using the AMI Semiconductor's 0.5-/spl mu/m double-poly triple-metal CMOS process. The three novel pixel circuits described herein increase the brightness of an XGA LCOS microdisplay by at least 36% without sacrificing image contrast ratio. The increase of brightness is attributed to maximizing overall image view time, allowing an image to be displayed at full contrast while the next image is buffered onto the backplane. The new circuits achieve this by removing charge sharing and charge inducement problems shown in previously proposed frame buffer pixel circuits. Voltages on the pixel electrodes measured through rail-to-rail operational amplifiers with negative feedback vary from 0 to 4.25 V (6-V power source). All data voltage levels remain constant over a frame time with less than 1% drop, thus ensuring maximum contrast ratio. Modeling and experimental measurement on the fabricated chip show that these pixel circuits outperform all others to date based on storage time, data storage level, and potential for highest contrast ratio with maximum brightness.     

Very high-order microring resonator filters for WDM applications

High-order microring resonators having from 1 to 11 coupled cavities are demonstrated. These filters exhibit low loss, flat tops, and out-of-band rejection ratios that can exceed 80 dB. They achieve performance that is suitable for commercial applications.     

High-power single-mode simplified antiresonant reflecting opticalwaveguide (S-ARROW) distributed feedback semiconductor lasers

Simplified antiresonant-reflective-optical-waveguide distributed-feedback semiconductor lasers based on Al-free InGaAs-InGaAsP-InGaP materials are reported for the first time. Devices with 6.5-μm-wide emitting apertures operate single-frequency (λ=0.968 μm) and single-spatial-mode to 157-mW continuous-wave output power. The full-width at half-maximum of the lateral far-field pattern is 4.5°, in excellent agreement with theory. Relative intensity noise values as low as -154 dB/Hz are measured between 500 MHz and 8 GHz     

Micropipelined asynchronous discrete cosine transform (DCT/IDCT)processor

We describe the design and implementation of an asynchronous discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) processor core compliant with the CCITT recommendation H.261. First, a micropipelined implementation with level-sensitive latches is shown. This is improved by replacing the level-sensitive latches with dual-edge triggered flip-flops to save power and using completion-detection adders in the critical stage of the pipeline to exploit the data-dependent processing delay. Gate-level simulation of extracted layouts indicates that the performance of asynchronous implementations is comparable with that of a synchronous implementation based on an identical architecture. This is because part of the penalty introduced by handshaking circuitry in an asynchronous pipeline can be recovered by exploiting data-dependent processing delays with completion-detection circuitry. In pipelines with significant arithmetic processing such as the DCT/IDCT processor, this is easily accomplished. Our results are encouraging because asynchronous designs do not employ global clocking. In the near future when clock generation, clock distribution, and the power consumed in the clock circuitry become limiting factors in the design of large synchronous application specific integrated circuits (ASICs), asynchronous implementation methodology could be pursued as a real alternative     

Advanced thin-film silicon-on-sapphire technology: microwavecircuit applications

This paper reviews the prospects of thin-film silicon-on-sapphire (TFSOS) CMOS technology in microwave applications in the 1-5 GHz regime and beyond and presents the first demonstration of microwave integrated circuits based on this technology, MOSFET's optimized for microwave use, with 0.5-μm optically defined gate lengths and a T-gate structure, have f_t values of 25 GHz (14 GHz) and f_max values of 66 GHz (41 GHz) for n-channel (p-channel) devices and have noise figure values below 1 db at 2 GHz, some of the best reported performance characteristics of any silicon-based MOSFET's to date. On-chip spiral inductors exhibit quality factors above ten. Circuit performance compares favorably with that of other CMOS-based technologies and approach performance levels similar to those obtained by silicon bipolar technologies. The results demonstrate the significant potential of this technology for microwave applications     

The role of self in third-person effects about body image

This study examines the perceived effect of idealized media images on self and classmates for three levels of outcome undesirability: perception of ideal body weight, effect on self-esteem, and likelihood of developing an eating disorder. A significant third-person effect was observed, which widened as the outcome increased in social undesirability. Those with high self-esteem exhibited stronger third-person effect than those with low self-esteem. The overall pattern of findings suggests that two related but distinct processes might be involved in the third person effect: (a) a general process associated with self-esteem, which explains perceived effect of media both on self and others; and (b) a specific process tied to situational personal vulnerability, which explains perceived effect on self, but does not explain perceived effect on others.     

Grain nucleation and texture analysis of electroless copper deposition on a palladium seed layer

Electroless copper grains were deposited on a Pd seed layer under varying bath conditions. The seed layer was determined to have a (111) texture using grazing incident x-ray (GIX) diffraction. Multiple nucleation sites in the grain boundaries were imaged using a scanning tunneling microscope. Continual copper growth produced row-like structures. The texture of the electrolessly deposited copper (ED-Cu) grains were determined to be (111). No radial grain orientation for the Pd seed layer or the ED-Cu thin film was detected using GIX diffraction. Atomic force microscope images indicated continual Cu nucleation throughout the deposition process. PdH was formed as a by-product of the electroless deposition process, and detected by x-ray diffraction.     

Molecular-beam epitaxial growth of HgCdTe infrared focal-plane arrays on silicon substrates for midwave infrared applications

Molecular beam epitaxy has been employed to deposit HgCdTe infrared detector structures on Si(112) substrates with performance at 125K that is equivalent to detectors grown on conventional CdZnTe substrates. The detector structures are grown on Si via CdTe(112)B buffer layers, whose structural properties include x-ray rocking curve full width at half maximum of 63 arc-sec and near-surface etch pit density of 3–5 × 10⁵ cm⁻² for 9 μm thick CdTe films. HgCdTe p⁺-on-n device structures were grown by molecular beam epitaxy (MBE) on both bulk CdZnTe and Si with 125K cutoff wavelengths ranging from 3.5 to 5 μm. External quantum efficiencies of 70%, limited only by reflection loss at the uncoated Si-vacuum interface, were achieved for detectors on Si. The current-voltage (I-V) characteristics of MBE-grown detectors on CdZnTe and Si were found to be equivalent, with reverse breakdown voltages well in excess of 700 mV. The temperature dependences of the I-V characteristics of MBE-grown diodes on CdZnTe and Si were found to be essentially identical and in agreement with a diffusion-limited current model for temperatures down to 110K. The performance of MBE-grown diodes on Si is also equivalent to that of typical liquid phase epitaxy-grown devices on CdZnTe with R₀A products in the 10⁶–10⁷ Θ-cm² range for 3.6 μm cutoff at 125K and R₀A products in the 10⁴–10⁵ Θ-cm² range for 4.7 μm cutoff at 125K.     

MBE growth and properties of ZnO on sapphire and SiC substrates

Molecular beam epitaxy (MBE) of ZnO on both sapphire and SiC substrates has been demonstrated. ZnO was used as a buffer layer for the epitaxial growth of GaN. ZnO is a würtzite crystal with a close lattice match (<2% mismatch) to GaN, an energy gap of 3.3 eV at room temperature, a low predicted conduction band offset to both GaN and SiC, and high electron conductivity. ZnO is relatively soft compared to the nitride semiconductors and is expected to act as a compliant buffer layer. Inductively coupled radio frequency plasma sources were used to generate active beams of nitrogen and oxygen for MBE growth. Characterization of the oxygen plasma by optical emission spectroscopy clearly indicated significant dissociation of O₂ into atomic oxygen. Reflected high energy electron diffraction (RHEED) of the ZnO growth surface showed a two-dimensional growth. ZnO layers had n-type carrier concentration of 9 × 10¹⁸ cm⁻³ with an electron mobility of 260 cm²/V-s. Initial I-V measurements displayed ohmic behavior across the SiC/ZnO and the ZnO/GaN heterointerfaces. RHEED of GaN growth by MBE on the ZnO buffer layers also exhibited a two-dimensional growth. We have demonstrated the viability of using ZnO as a buffer layer for the MBE growth of GaN.     

Signal processing hardware in a radio LAN demonstrator

In order to demonstrate the practicality of high speed radio LANs, such as HIPERLAN, a hardware demonstrator has been built. To overcome the inter-symbol interference caused by the dispersive nature of the indoor radio channel, a decision feedback equaliser has been included in the system. No central synchronisation is provided in a network and a node must be able to derive all synchronisation from a received packet. This paper describes all of the signal processing hardware built for the demonstrator. The demonstrator is not standards compliant but the physical layer parameters are very similar and the signal processing required in HIPERLAN equipment will be very similar to that in the demonstrator.