Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays

This paper presents results of using a Coarse Grain Reconfigurable Architecture called DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in order and degree of parallelism using radix-2 decimation in time (DIT). The DRRA fabric is extended with memory architecture to be able to deal with data-sets much larger than what can be accommodated in the register files of DRRA. The proposed implementation scheme is generic in terms of the number of FFT point, the size of memory and the size of register file in DRRA. Two implementations (DRRA-1 and DRRA-2) have been synthesized in 65 nm technology and energy/delay numbers measured with post-layout annotated gate level simulations. The results are compared to other Coarse Grain Reconfigurable Architectures (CGRAs), and dedicated FFT processors for 1024 and 2048 point FFT. For 1024 point FFT, in terms of FFT operations per unit energy, DRRA-1 and DRRA-2 outperforms all CGRA by at least 2× and is worse than ASIC by 3.45×. However, in terms of energy-delay product DRRA-2 outperforms CGRAs by at least 1.66× and dedicated FFT processors by at least 10.9×. For 2048-point FFT, DRRA-1 and DRRA-2 are 10× better for energy efficiency and 94.84 better for energy-delay product. However, radix-2 implementation is worse by 9.64× and 255× in terms of energy efficiency and energy-delay product when compared against a radix-2⁴ implementation.

     

Edge-Node-Aware Adaptive Data Processing Framework for Smart Grid

Wireless Personal Communications - Smart grid is an autonomous power generation and production system, that includes various energy management sub-systems such as energy efficient resources, smart...     

Wireless LAN Access Point Placement Based on User Mobility

In a wide area campus, a university provides Wireless Local Area Network (WLAN) for users to connect to the Internet. Most users take advantage of this WLAN benefit by using their laptops. However, the number of smart phone users is growing fast. Since a smart phone is able to get an Internet connection using WLAN, users can use their smart phones without having to pay for a cellular operator. Users tend to use their smart phones more, due to their higher mobility compared to a laptop. This capability enables new services in the market, such as Fixed-Mobile Convergence (FMC), which integrates a fixed network (traditional telephony, WLAN) and a mobile network (cellular) to provide seamless voice communications anytime, anywhere. These new applications require a WLAN connection availability nearly everywhere. However, due to limited budgets, a university can only install APs in places with a high connection demand. We propose a novel WLAN AP placement technique that takes user mobility into consideration. This new approach is more complete than previous approaches, which mainly focus on coverage area and throughput data. Our technique has been implemented in our university. The results show the suitability of the WLAN access point locations in our university campus based on user mobility and activities.     

Interface state densities, low frequency noise and electron mobility in surface channel In0.53Ga0.47As n-MOSFETs with a ZrO2 gate dielectric

This paper reports on an investigation of interface state densities, low frequency noise and electron mobility in surface channel In_0.53Ga_0.47As n-MOSFETs with a ZrO₂ gate dielectric. Interface state density values of D_it ∼ 5 × 10¹² cm⁻² eV⁻¹ were extracted using sub-threshold slope analysis and charge pumping technique. The same order of magnitude of trap density was found from low frequency noise measurements. A peak effective electron mobility of 1200 cm²/Vs has been achieved. For these surface channel In_0.53Ga_0.47As n-MOSFETs, it was found that η parameter, an empirical parameter used to calculate the effective electric field, was ∼0.55, and is to be comparable to the standard value found in Si device.     

A 550-MSample/s 8-Tap FIR digital filter for magnetic recordingread channels

An area-efficient low-power and low-latency 550-MSample/s FIR filter for magnetic recording read channel applications is presented. A parallel direct type II architecture operates on real-time deinterleaved (even and odd) input data samples and employs a fast low-area multiplier based on selection of radix-8 premultiplied coefficients in conjunction with one-hot encoded bus leading to a very compact layout and reduced power dissipation. The chip has been fabricated using a 0.18-μm L-effective CMOS technology and is currently being used in commercial applications     

On the realization of the current controlled current-mode amplifier using the current controlled conveyor

The current controlled current-mode amplifier proposed by Fabre et al. (1996, IEEE Transactions on Circuits and Systems—I, 43, 82) is reanalysed to show that it can work not only under small signal conditions, as suggested by Fabre et al., but also under large signal conditions. Simulation results which confirm the theory presented are included.     

Road Oriented Traffic Information System for Vehicular Ad hoc Networks

Over the last few years, vehicular ad hoc networks (VANETs) have gained popularity for their interesting applications. To make efficient routing decisions, VANET routing protocols require road traffic density information for which they use density estimation schemes. This paper presents a distributed mechanism for road vehicular density estimation that considers multiple road factors, such as road length and junctions. Extensive simulations are carried out to analyze the effectiveness of the proposed technique. Simulation results suggested that, the proposed technique is more accurate compared to the existing technique. Moreover, it facilitate VANET routing protocols to increase packet delivery ratio and reduce end-to-end delay.     

Application of local error method to SSSF simulation of vector propagation in dispersion compensated optical links

A local error method based on an analytical scheme previously developed for the scalar optical fiber channel is applied to the second-order symmetrized split-step Fourier simulation of polarization multiplexed signal propagation through dispersion compensated optical fiber links. It is found that the global simulation accuracy for the vector propagation can be satisfied using the local error bound from a scalar propagation model for the same global error over a large range of simulation accuracy, chromatic dispersion, and differential group delay. Furthermore, carefully designed numerical simulations are used to show that similar local simulation error are obtained for vector simulations and that the similar local error leads to higher computational efficiency compared to other prevalent step-size selection schemes. The scaling of the global simulation error with respect to the number of optical fiber spans is demonstrated, and global error control for multi-span simulations is proposed. Combining the local error and global error control, the developed simulation scheme can significantly speed up the time-consuming simulations in coherent optical fiber communication system analysis and design.     

An adaptive and efficient buffer management scheme for resource-constrained delay tolerant networks

Provisioning buffer management mechanism is especially crucial in resource-constrained delay tolerant networks (DTNs) as maximum data delivery ratio with minimum overhead is expected in highly congested environments. However, most DTN protocols do not consider resource limitations (e.g., buffer, bandwidth) and hence, results in performance degradation. To strangle and mitigate the impact of frequent buffer overflows, this paper presents an adaptive and efficient buffer management scheme called size-aware drop (SAD) that strives to improve buffer utilization and avoid unnecessary message drops. To improve data delivery ratio, SAD exactly determines the requirement based on differential of newly arrived message(s) and available space. To vacate inevitable space from a congested buffer, SAD strives to avoid redundant message drops and deliberate to pick and discard most appropriate message(s) to minimize overhead. The performance of SAD is validated through extensive simulations in realistic environments (i.e., resource-constrained and congested) with different mobility models (i.e., Random Waypoint and disaster). Simulation results demonstrate the performance supremacy of SAD in terms of delivery probability and overhead ratio besides other metrics when compared to contemporary schemes based on Epidemic (DOA and DLA) and PRoPHET (SHLI and MOFO).