Novel technique for SiO2 formed by liquid-phasedeposition for low-temperature processed polysilicon TFT

A technique for SiO₂ formation by liquid-phase deposition (LPD) at nearly room temperature for low-temperature processed (LTP) polysilicon thin-film transistor (poly-Si TFT) was developed. LPD SiO₂ film with a lower P-etch rate shows a dense structure. LPD SiO₂ also exhibits good electrical characteristics. LTP poly-Si thin-film transistors (TFTs) with LPD SiO ₂ as the gate insulator have been fabricated and investigated. Their characteristics indicate performance adequate for their use as pixel transistors in liquid crystal displays (LCDs)     

The importance of electrochemistry-related etching in thegate-groove fabrication for InAlAs/InGaAs HFETs

For the first time, the surface metal on nonalloyed ohmic electrodes is found to significantly change the profiles of gate grooves, when resist openings are employed to monitor drain current during wet-chemical gate recess for sub-micron InAlAs/lnGaAs heterojunction field-effect transistors (HFETs). The surface metal of Ni enhances the etching rate in comparison with that in the absence of electrodes by a factor of 4 and 10, laterally and vertically, which is favorable to fabricate deep gate grooves with small side etching. The Pt surface metal, however, leads to preferential etching of InGaAs over InAlAs, which can be useful to realize large side etching. The existence of an electrochemistry-related etching component, which arises when the ohmic electrodes are present during recess etching, is considered to be responsible for these behaviors     

Introducing computer tools into a first course in electricalengineering

At a school where engineering students have immediate access to a personal computer, it is important that they become familiar with that tool early in their studies. In introductory engineering courses it is also important that the students learn to perceive the computer as a tool and not as an end in itself. Achieving these goals requires a careful integration of computer usage into such courses by the instructors. In this paper we examine this issue in the context of a first course in electrical engineering that has been taught at the US Naval Academy, and we present specific examples of assignments we have used in our effort to accomplish these goals     

New fault locating system for air-insulated substations usingoptical current detector

The authors present the basic philosophy, construction, design features, and test results of a new fault locating system. This fault locating system helps to shorten the time required for restoration of service after the occurrence of a busbar fault in an air-insulated distribution substation. Recent optical and electronic technologies allow the design of a highly accurate and compact fault locating system which consists of optical current detectors using the Faraday effect and a fault locating processor using a digital data processing technique. The fault location is carried out by discriminating between the directions of zero-sequence currents. Through various tests and field operations, it has been confirmed that the system has sufficient performance for practical applications     

Overgrowth and DNA synthesis of neuroepithelium in embryonic stages of induced Long-Evans rat myeloschisis

Overgrowth of the myeloschisis, namely the excessive amount of the neural plate tissue, has been reported in the human myeloschisis. However, it is still debatable how the overgrowth develops and whether the overgrowth is the cause, or the secondary effect of spinal dysraphism. The author induced myeloschisis in the fetuses of Long-Evans rats by the administration of ethylenethiourea (ETU) to pregnant rats on day 10 of gestation. The fetuses were removed 1 hour after the treatment with bromodeoxyuridine (BrdU) to the dams on day 14 and 21. The fetuses were fixed in alcohol and embedded in paraffin. H-E staining and the immunohistologic examination were performed on the staining patterns to anti-neurofilament (NFP), anti-glial fibrillary acidic protein (GFAP) and anti-BrdU antibody by ABC method. On day 14, the lateral portion of everted neural plate showed a loose arrangement of cells and there was rosette formation in the mesoderm. On day 21, cell necrosis was observed at the dorsolateral portion of myeloschisis, although the ventral portion showed almost normal cytoarchitecture and was positive to NFP and GFAP. The cause of myeloschisis in this model is supposed to be the local and direct cytotoxic effect of ETU to neuro-ectodermal junction. On day 14, control animals contained few BrdU-incorporated cells at the basal plate of neural tube. In contrast, everted neural plate showed an active uptake of BrdU diffusely in the subependymal matrix layer cells. Overgrowth was not yet identified. On day 21, overgrowth of myeloschisis was found in spite of a few positive cells to BrdU which was identical to the control animals. These findings seem to suggest that cells in the myeloschisis retain their ability of DNA synthesis for longer periods of development and overgrowth found on day 21 is possibly a secondary effect of spinal dysraphism in this model.     

Idiopathic epilepsy in the dog

The authors present a brief history of the development of the Ilizarov external fixator, and the classic uses associated with it. A preliminary study of 3 patients using 56 frames is presented. The Ilizarov external fixator is successfully used in these cases in place of traditional fixation.     

Dynamic programming implementation on array processor architectures

Dynamic Programming (DP) applies to many signal and image processing applications including boundary following, the Viterbi algorithm, dynamic time warping, etc. This paper presents an array processor implementation of generic dynamic programming. Our architecture is a SIMD array attached to a host computer. The processing element of the architecture is based on an ASIC design opting for maximum speed-up. By adopting a torus interconnection network, a dual buffer structure, and a multilevel pipeline, the performance of the DP chip is expected to reach the order of several GOPS. The paper discusses both the dedicated hardware design and the data flow control of the DP chip and the total array.This work was supported in part by the NATO, Scientific and Environmental Affairs Division, Collaborative Research Grant SA.5-2-05(CRG.960201)424/96/JARC-501.     

A neural network-based power system stabilizer using power flowcharacteristics

A neural network-based power system stabilizer (neuro-PSS) is designed for a generator connected to a multi-machine power system utilizing the nonlinear power flow dynamics. The use of power flow dynamics provides a PSS for a wide range of operation with reduced size neural networks. The neuro-PSS consists of two neural networks: neuro-identifier and neuro-controller. The low-frequency oscillation is modeled by the neuro-identifier using the power flow dynamics, then a generalized backpropagation-through-time (GBTT) algorithm is developed to train the neuro-controller. The simulation results show that the neuro-PSS designed in this paper performs well with good damping in a wide operation range compared with the conventional PSS     

Ozone micro-bubble disinfection method for wastewater reuse system.

Reuse of wastewater is regarded as one important way to deal with the world's shortage of potable water. The authors focused on a disinfection system using micro-bubbles and evaluated its capability for wastewater reuse. This paper reports experimental results from examination of the basic characteristics of micro-bubbles and disinfection of secondary effluent by air or ozone micro-bubbles. The results suggest that when micro-bubbles are applied in an ozonation system it is possible to reduce the reactor size, the amount of ozone decomposition equipment needed and the ozone dose rate.