Analysis and optimization of DS-CDMA systems with time-limited partial response chip waveforms

Conventional direct sequence code division multiple access systems (DS-CDMA) using offset quadrature phase shift key (OQPSK) usually employ a strictly bandlimited partial response square-root raised cosine pulse as the chip waveform. They have the disadvantage of large envelope fluctuation that will incur performance degradation due to the intermodulation and bandwidth enlargement caused by post nonlinear processing. To improve the performance of DS-CDMA systems, the chip waveform and receiver should be properly selected. This paper presents a systematic performance analysis of a matched filter receiver and zero-forcing filter (ZF) receiver for DS-CDMA using a time-limited partial response chip waveform. Nevertheless the systematic performance analysis is applicable to bandlimited chip pulse as well. For the zero-forcing filters, we propose to select the frequency responses that satisfy the first Nyquist criterion. With this class of filters, we can choose the roll-off factor to minimize the total power of multiple access interference and noise power. The zero-forcing filter with proper choice of roll-off factor, referred to as optimum ZF, yields a performance better than the matched filter counterpart. The bit error rate (BER) performance of the optimum ZF with superposed quadrature amplitude modulation signal as the time pulse waveform is evaluated. It is shown that the optimum ZF provides better BER performance than conventional OQPSK and minimum shift keying, and its envelope uniformity is much better than that of OQPSK.     

Solder joint reliability of TFBGA assemblies with fresh and reworked solder balls

In this article, the solder joint reliability of thin and fine-pitch BGA (TFBGA) with fresh and reworked solder balls is investigated. Both package and board level reliability tests are conducted to compare the solder joint performance of test vehicle with fresh and reworked solder balls. For package level reliability test, ball shear test is performed to evaluate the joint strength of fresh and reworked solder balls. The results show that solder balls with rework process exhibit higher shear strength than the ones without any rework process. The results also exhibit that the different intermetallic compound (IMC) formation at solder joints of fresh and reworked solder balls is the key to degradation of shear strength. For board level reliability tests, temperature cycling and bending cyclic tests are both applied to investigate the fatigue life of solder joint with fresh and reworked solder balls. It is observed that package with reworked solder ball has better fatigue life than the one with fresh solder ball after temperature cyclic test. As for bending cyclic test, in addition to test on as-assembled packages, reworked and fresh samples are subjected to heat treatment at 150 °C for 100 h prior to the bending cyclic test. The purpose is to let Au–Ni–Sn IMC resettle at solder joints of fresh solder ball and examine the influence of Au–Ni–Sn IMC on the fatigue life of solder joints (Au embrittlement effect). The final results confirm that reworked solder balls have better reliability performance than fresh one since Au embrittlement dose exist at fresh solder ball.     

Comprehensive Study of Emitter-Ledge Thickness of InGaP/GaAs HBTs

A comprehensive study of emitter-ledge thickness of InGaP/GaAs heterojunction bipolar transistors (HBTs) has been undertaken. It is shown that the recombination rate and electron densities are drastically increased near the exposed base surface between the base contact and the emitter ledge. In contrast, the corresponding hole densities are decreased. If the emitter ledge is too thick, current will flow through the undepleted ledge, which increases the emitter-size effect. In contrast, if the emitter ledge is too thin, it may not effectively passivate the surface. Therefore, the thickness of the emitter ledge is a crucial issue and should be carefully considered. It is shown that, from simulated and experimental results, the optimum emitter-ledge thickness of InGaP/GaAs HBT is 100-200 Aring     

Two-stage cut saturation algorithm for designing all-opticalnetworks

We design and optimize the physical topology of all-optical networks. This problem is more challenging than the traditional one for electronic communication networks, because of the wavelength-continuous constraint and it involves routing and wavelength assignment. In this problem, we are given the number of lightpaths required by every node pair and a cost specification, and our objective is to determine a physical topology of minimal cost. We formulate the problem, prove that it is NP-hard, and design an efficient algorithm called two-stage cut saturation algorithm for it. In the first stage, we relax the wavelength-continuous constraint and apply the main idea of the cut saturation method to determine a good initial network. In the second stage, we impose the wavelength-continuous constraint and perform routing and wavelength assignment to establish the specified lightpaths on the initial network. When some lightpaths cannot be established, we apply the main idea of the cut saturation method to optimize the insertion of additional links into the network. Simulation results show the following: (1) the proposed algorithm can efficiently design networks with low costs and high utilization and (2) if wavelength converters are available to support full wavelength conversion, the total cost of the links can be significantly reduced     

A Fiber Splicing-Plane-Inspection Technique Using Lens–Fiber Interference for the Cascaded Fiber Fabrication

In this paper, a novel inspection technique for the cascaded fiber fabrication is proposed to improve the coupling performance of such fibers. Instead of using a direct-monitoring method, an indirect technique with the help of the ray tracing and the lens-fiber interference is used. By calculating the optical-path length of the light rays passing through the fiber, the interference fringes and light intensity can be counted. Then, the splicing plane of the cascaded fiber can be determined by observing the difference between the two fiber sections. Simulations and experiments have been performed to find the splicing plane. Finally, the accuracy of fabrication can be improved from 10 to about 1 mum; thus, the coupling loss due to the fabrication process can be reduced.     

A Wide Tuning Range Gm –C Continuous-Time Analog Filter

A CMOS operational transconductance amplifier (OTA) for low-power and wide tuning range filter application is proposed in this paper. The OTA can work from the weak inversion region to the strong inversion region to maximize the transconductance tuning range. The transconductance can be tuned by changing its bias current. A fifth-order Elliptic low-pass filter implemented with the OTAs was integrated by TSMC 0.18-mum CMOS process. The filter can operate with the cutoff frequency of 250 Hz to 1 MHz. The wide tuning range filter would be suitable for multi-mode applications, especially under the consideration of saving chip areas. The third-order inter-modulation (IM3) of -40 dB was measured over the tuning range with two tone input signals. The power consumption is 0.8 mW at 1-MHz cutoff frequency and 1.8-V supply voltage with the active area less than 0.3 mm²     

A location‐aware peer‐to‐peer overlay network

This work describes a novel location‐aware, self‐organizing, fault‐tolerant peer‐to‐peer (P2P) overlay network, referred to as Laptop. Network locality‐aware considerations are a very important metric for designing a P2P overlay network. Several network proximity schemes have been proposed to enhance the routing efficiency of existing DHT‐based overlay networks. However, these schemes have some drawbacks such as high overlay network and routing table maintenance overhead, or not being completely self‐organizing. As a result, they may result in poor scalability as the number of nodes in the system grows. Laptop constructs a location‐aware overlay network without pre‐determined landmarks and adopts a routing cache scheme to avoid maintaining the routing table periodically. In addition, Laptop significantly reduces the overlay maintenance overhead by making each node maintain only the connectivity between parent and itself. Mathematical analysis and simulations are conducted to evaluate the efficiency, scalability, and robustness of Laptop. Our mathematical analysis shows that the routing path length is bounded by log_d N, and the joining and leaving overhead is bounded by d log_d N, where N is the number of nodes in the system, and d is the maximum degree of each node on the overlay tree. Our simulation results show that the average latency stretch is 1.6 and the average routing path length is only about three in 10 000 Laptop nodes, and the maximum degree of a node is bounded by 32. Copyright © 2006 John Wiley & Sons, Ltd.     

An organic hydrogel film with micron-sized pillar array for real-time and indicator-free detection of Zn

A hydrogel sensing film for a real-time and indicator-free detection of Zn²⁺ is developed by embedding a fluorescent indicator 11,16-bis(phenyl)-6,6,21,21-tetramethyl-m-benzi-6,21-porphodimethene in a hydrogel host poly(2-hydroxyethyl methacrylate). The sensing film shows high stability and selectivity to Zn²⁺. The sensitivity of the sensing film is increased by fabricating a micron-sized pillar array on the surface of the sensing film to increase the surface area. For Zn²⁺ concentrations of 10⁻⁴ and 10⁻³ M, the response time is 30 and 3 s, respectively.     

A Steganography-Based Optical Image Encryption System Using RGB Channel Integration

An optical image encryption system with adaptive steganography using red, green, and blue (RGB) channel integration is proposed. The optical image encryption system employs a double random phase encoding algorithm to encrypt and decrypt color images. The RGB channel in a color image is first integrated into a large grayscale image. Then the integrated image is encrypted by two random phase masks. The secret data is then embedded into the encrypted image with a specific hiding sequence generated by the zero-LSB (least significant bits) sorting technique which is a content-dependent and low distortion data embedding method. Experimental results show that the proposed method has a good performance in both hiding capacity and decrypted image quality.     

Conception of Stretchable Resistive Memory Devices Based on Nanostructure‐Controlled Carbohydrate‐block‐Polyisoprene Block Copolymers

It is discovered that the memory‐type behaviors of novel carbohydrate‐block ‐polyisoprene (MH‐b ‐PI) block copolymers‐based devices, including write‐once‐read‐many‐times, Flash, and dynamic‐random‐access‐memory, can be easily controlled by the self‐assembly nanostructures (vertical cylinder, horizontal cylinder, and order‐packed sphere), in which the MH and PI blocks, respectively, provide the charge‐trapping and stretchable function. With increasing the flexible PI block length, the stretchability of the designed copolymers can be significantly improved up to 100% without forming cracks. Thus, intrinsically stretchable resistive memory devices (polydimethylsiloxane(PDMS)/carbon nanotubes(CNTs)/MH‐b ‐PI thin film/Al) using the MH‐b ‐PI thin film as an active layer is successfully fabricated and that using the MH‐b ‐PI_12.6k under 100% strain exhibits an excellent ON/OFF current ratio of over 10⁶ (reading at ?1 V) with stable V _set around ?2 V. Furthermore, the endurance characteristics can be maintained over 500 cycles upon 40% strain. This work establishes and represents a novel avenue for the design of green carbohydrate‐derived and stretchable memory materials.