Thickness scaling limitation factors of ONO interpoly dielectricfor nonvolatile memory devices

This paper describes the scaling limitation factors of ONO interpoly dielectric thickness, mainly considering the charge retention capability and threshold voltage stability for nonvolatile memory cell transistors with a stacked-gate structure, based on experimental results. For good intrinsic charge retention capability, either the top- or bottom-oxide thickness should be greater than around 6 nm. On the other hand, a thicker top oxide structure is preferable to minimize degradation due to defects. It has been confirmed that a 3.2 nm bottom-oxide shows detectable threshold voltage instability, but 4 nm does not. Effective oxide thickness scaling down to around 13 nm should be possible for flash memory devices with a quarter-micron design rule     

Group 3 error-free facsimile terminal for analog cellular networks

A Group 3 error-free facsimile terminal for use in an analog cellular network has been developed. This facsimile terminal is provided with the International Telecommunication Union (ITU-T, formerly CCITT) T.30 recommendation protocol and an adaptive error control scheme (AECS) for Group 3 communication and error-free communication. The AECS monitors the channel conditions and selects the optimum error correction code. The ITU-T V.27ter is used as the modulation method and the transmission rate is 4800 bps. This system is compatible with the modified Huffman (MH), modified READ (MR), and modified modified READ (MMR) image data compression codes. The average communication time of this facsimile terminal is 40 s per page while moving through the analog cellular network     

Fabrication of long-period fibre grating by CO/sub 2/ laser-annealing in fibre-drawing process

Long-period fibre grating (LPFG) writing by a CO₂ laser-annealing using a fibre-drawing process is demonstrated. The fibre in the drawing process was irradiated periodically by a CO₂ laser to modify the refractive index. An LPFG with transmission loss of -10 dB and full width at half-maximum of 13 nm has been fabricated. Results show that the refractive index change was induced by stress at the moment of laser annealing     

Novel Conjugated Organic Dyes for Efficient Dye‐Sensitized Solar Cells

Novel conjugated organic dyes that have N,N‐dimethylaniline (DMA) moieties as the electron donor and a cyanoacetic acid (CAA) moiety as the electron acceptor were developed for use in dye‐sensitized nanocrystalline‐TiO₂ solar cells (DSSCs). We attained a maximum solar‐energy‐to‐electricity conversion efficiency (η) of 6.8 % under AM 1.5 irradiation (100 mW cm^–2) with a DSSC based on 2‐cyano‐7,7‐bis(4‐dimethylamino‐phenyl)hepta‐2,4,6‐trienoic acid (NKX‐2569): short‐circuit photocurrent density (J_sc) = 12.9 mA cm^–2, open‐circuit voltage (V_oc) = 0.71 V, and fill factor (ff) = 0.74. The high performance of the solar cells indicated that highly efficient electron injection from the excited dyes to the conduction band of TiO₂ occurred. The experimental and calculated Fourier‐transform infrared (FT‐IR) absorption spectra clearly showed that these dyes were adsorbed on the TiO₂ surface with the carboxylate coordination form. A molecular‐orbital calculation indicated that the electron distribution moved from the DMA moiety to the CAA moiety by photoexcitation of the dye.     

A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio,and system encoder with a 64-Mb embedded DRAM for portable 422P@HLencoder system

A scalable single-chip 422P@ML MPEG-2 video, audio, and system encoder LSI for portable 422P@HL system is described. The encoder LSI is implemented using 0.13-μm embedded DRAM technology. It integrates 3-M logic gates and 64-Mb DRAM in an area of 99-mm². The power consumption is suppressed to 0.7 W by adopting a low-power DRAM core. It performs real-time 422P@ML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422P@HL video encoder with multichip configuration, due to its scalable architecture. This results in a PC-card size 422P@HL encoder for portable HDTV codec system     

Dependence of the efficiency-bandwidth product on electrical volumeof small dielectric loaded antennas

The efficiency fractional efficiency bandwidth product (EB) that is expressed as a ratio of the radiation resistance to the absolute value of an input reactance of an antenna is used as a performance measure for small dielectric-loaded monopole antennas (DLMAs). The dependence of the efficiency bandwidth (EB) on the permittivity of the dielectric loading (i.e., the electrical volume) is experimentally investigated for the first time after we succeeded in measuring the small radiation resistance of the DLMAs precisely on the basis of the Wheeler cap method. As a result, it was found that the EBs of some DLMAs were enhanced over a bare monopole antenna and an EB characteristic curve has a maximum point. This result suggests the presence of the optimum electrical volume for the dielectric loading in order to obtain the best EB performance. A calculation by the finite-difference time-domain (FDTD) method was also conducted to confirm the presence of the maximum EB value under a certain condition. A general reason for the existence of the peak value is also explained using a mathematical deduction     

High-bandwidth graded-index polymer optical fiber with high-temperature stability

A newly developed graded-index polymer optical fiber (GI-POF) with high-temperature and high-humidity stability was proposed. As it was found that the high numerical aperture and high glass transition temperature (T/sub g/) at the core center of the GI-POF were key issues to achieve both high-temperature and humidity stability, a partially fluorinated polymer material was adopted to obtain both characteristics in the GI-POF. The newly developed GI-POF had low-loss (140 dB/km at 650-nm wavelength), high-bandwidth (higher than 1 GHz for 100 m transmission), high-temperature and humidity stability at 70/spl deg/C, 80% relative humidity (R.H.) and low bending loss.     

Synthesis of hardware models in C with pointers and complex datastructures

One of the greatest challenges in a C/C++-based design methodology is efficiently mapping C/C++ models into hardware. Many networking and multimedia applications implemented in hardware or mixed hardware/software systems now use complex data structures stored in multiple memories, so many C/C++ features that were originally designed for software applications are now making their way into hardware. Such features include dynamic memory allocation and pointers for managing data. We present a solution for efficiently mapping arbitrary C code with pointers and malloc/free into hardware. Our solution, which fits current memory management methodologies, instantiates an application-specific hardware memory allocator coupled with a memory architecture. Our work also supports the resolution of pointers without restriction on the data structures. We present an implementation based on the SUIF framework along with case studies such as the realization of a video filter and an ATM segmentation engine     

Photonic transport network OAM technologies

The optical path concept was proposed to realize ubiquitous B-ISDN. It can make quantum leaps in both transmission capacity and cross-connect throughput simultaneously by exploiting WDM (wavelength division multiplexing) transmission and the wavelength routing capabilities of paths. Since the optical path is a new concept, new operation and management (OAM) systems and related technologies need to be developed before it can be fully utilized. This article discusses some of the key OAM-related issues and identifies the technical points necessary for future developments. The issues include optical path realization technologies, optical path accommodation design problems, a newly proposed optical transport network layer architecture, and the optical transport module for the network node interface     

A real-time motion estimation and compensation LSI with wide searchrange for MPEG2 video encoding

This paper presents a motion estimation and compensation large scale integration (LSI) for the MPEG2 standard. An embedded RISC processor and special hardware modules enable the LSI to achieve a sufficient ability to perform real-time operation and provide the availability to realize many kinds of block matching algorithms. Using a three-step hierarchical telescopic search algorithm, a single chip accomplishes real-time motion estimation with search ranges of ±32.5×±32.5 pixels for motion vectors. The chip was fabricated using 0.5-μm CMOS technology and has an area of 16.5×16.5 mm² and 2.0 M transistors