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Jui-I Tsai Woei-Wu Pai Feng-Chang Hsu Po-Jui Chen Ching-Cheng Teng Tai-Shan Liao 《电子设计技术》2007,14(12):112-112,114
大多数实验室和工业环境中都存在着多种全频带电气噪声源,它们来自于重型机器、仪表、电源和电视台.工程师要用很多设备和技术来对付这种噪声.这些技术包括采用正确的接地方式、屏蔽和双绞线、信号均化、差分输入电压放大器和滤波器. 相似文献
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Ming-Chang Pai 《International journal of systems science》2013,44(12):1501-1510
This article presents a discrete-time sliding mode control method for the robust stabilisation of linear uncertain multi-input discrete-time systems with state and input delays. The systems are assumed to have structured mismatched time-varying parameter uncertainties. A specified switching surface is proposed and a sliding mode controller is derived to ensure the existence of the quasi-sliding mode. Based on the improved Lyapunov function and linear matrix inequality technique, delay-independent sufficient conditions for the design of a stable switching surface are given and the stability of the overall closed-loop system is guaranteed. Neither chattering phenomenon will occur nor the knowledge of upper bound of uncertainties is required. Finally, simulation results demonstrate the efficacy of the proposed control methodology. 相似文献
145.
Heald R. Aingaran K. Amir C. Ang M. Boland M. Dixit P. Gouldsberry G. Greenley D. Grinberg J. Hart J. Horel T. Wen-Jay Hsu Kaku J. Chin Kim Song Kim Klass F. Kwan H. Lauterbach G. Lo R. McIntyre H. Mehta A. Murata D. Nguyen S. Yet-Ping Pai Patel S. Shin K. Tam K. Vishwanthaiah S. Wu J. Yee G. You E. 《Solid-State Circuits, IEEE Journal of》2000,35(11):1526-1538
This quad-issue processor achieves 1-GHz operation through improved dynamic circuit techniques in critical paths and a more extensive on-chip memory system which scales in both bandwidth and latency. Critical logic paths use domino, delayed clocked domino, and logic embedded in dynamic flip-flops for minimum delay. A 64-KB sum-addressed memory data cache combines the address offset add with the cache decode, allowing the average memory latency to scale by more than the clock ratio. Memory bandwidth is improved by using wave pipelined SRAM designs for on-chip caches and a write cache for store traffic. Memory power is controlled without increased latency by use of delayed-reset logic decoders. The chip operates at 1000 MHz and dissipates less than 80 W from a 1.6-V supply. It contains 23 million transistors (12 million in RAM cells) on a 244 mm2 die 相似文献
146.
Statistical AM-FM models, extended Kalman filter demodulation,Cramer-Rao bounds, and speech analysis
A stochastic dynamical system model for describing time signals that are jointly amplitude (AM) and frequency (FM) modulated is presented. The signal is assumed to be bandpass, perhaps originating from a filter bank applied to a broadband signal, and includes the constraint that the magnitude of the complex baseband signal is positive. Motivated by speech processing and the desire for narrowband modulating signals, time is divided into frames, and the modulating signals are smoothly interpolated across each frame. The model allows a detailed characterization of the bandwidth of the modulating signals and the statistical character of the measurement noise. An adaptive estimation algorithm based on extended Kalman filtering ideas for extracting the modulating signals from the measured signal is described and demonstrated on both voiced and unvoiced speech signals. The Cramer-Rao bound on the performance of any estimator is computed 相似文献
147.
Fang‐Cheng Lin Yi‐Pai Huang Ching‐Ming Wei Han‐Ping D. Shieh 《Journal of the Society for Information Display》2009,17(3):221-228
Abstract— Field‐sequential color (FSC) is a potential technique for low‐power liquid‐crystal displays (LCDs). However, it still experiences a serious visual artifact, color break‐up (CBU), which degrades image quality. Consequently, the “Stencil Field‐Sequential‐Color (Stencil‐FSC)” method, which applies local color‐backlight‐dimming technology at a 240‐Hz field rate to FSC‐LCDs, is proposed. Using the Stencil‐FSC method not only suppressed CBU efficiently but also enhanced the image contrast ratio by using low average power consumption. After backlight signal optimization, the Stencil‐FSC method was demonstrated on a 32‐in. FSC‐LCD and effectively suppressed the CBU, which resulted in more than a 27,000:1 dynamic contrast ratio and less than 40‐W average power consumption. 相似文献
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