The design and implementation of a low-power clock-poweredmicroprocessor

We describe the design and implementation of a 16-bit clock-powered microprocessor that dissipates only 2.9 mW at 15.8 MHz based on laboratory measurements. Clock-powered logic (CPL) has been developed as a new approach for designing and building low-power VLSI systems that exploit the benefits of supply-voltage-scaled static CMOS and energy-recovery CMOS techniques. In CPL, the clock signals are a source of ac power for the other large on-chip capacitive loads. Clock amplitude and waveform shape combine to reduce power. By exploiting energy recovery and an energy-conserving clock driver, it is possible to build ultra-low-power CMOS processors with this approach. We compare the CPL approach with a conventional, fully dissipative approach for a processor with a similar ISA and VLSI architecture which was designed using the same set of VLSI CAD tools. The simulation results indicate that the CPL microprocessor would dissipate 40% less power than the conventional design     

农村通信网络需求及建设模式分析

在分析农村通信需求的基础上,通过实际案例,介绍了农村通信网络建设的主要思路和建设模型。     

龙滩水电工程环境影响综合评价方法研究

针对龙滩工程对各环境因子复杂的影响需进行综合分析评价，以便了解工程兴建前后的环境总体情况，以及工程的可行性，并为选择工程方案提供科学依据。采用多级模糊综合评价法及灰色关联分析综合评价法对龙滩水电工程环境影响进行了分析后，认为工程兴建是可行的。     

特征理论求解对流问题的新方法

对经典对流方程的数值解建立了时间序列插值的数值格式。其主要特点，是在特征线脚所在时间插值区间的两个基点上进行插值。理论分析和对典型实例验算结果表明，此格式经济有效，比空间插值方法具有更高的精度，同时不存在边界条件处理上的困难。     

Controlled Growth of ZnO Nanowires and Their Optical Properties

This article surveys recent developments in the rational synthesis of single‐crystalline zinc oxide nanowires and their unique optical properties. The growth of ZnO nanowires was carried out in a simple chemical vapor transport and condensation (CVTC) system. Based on our fundamental understanding of the vapor–liquid–solid (VLS) nanowire growth mechanism, different levels of growth controls (including positional, orientational, diameter, and density control) have been achieved. Power‐dependent emission has been examined and lasing action was observed in these ZnO nanowires when the excitation intensity exceeds a threshold (∼40 kW cm^–2). These short‐wavelength nanolasers operate at room temperature and the areal density of these nanolasers on substrate readily reaches 1 × 10¹⁰ cm^–2. The observation of lasing action in these nanowire arrays without any fabricated mirrors indicates these single‐crystalline, well‐facetted nanowires can function as self‐contained optical resonance cavities. This argument is further supported by our recent near‐field scanning optical microscopy (NSOM) studies on single nanowires.     

Optical bistability in an L-band dual-wavelength erbium-doped fiber laser with overlapping cavities

The authors investigate the optical bistability in an L-band dual-wavelength erbium-doped fiber (EDF) laser with overlapping cavities. The bistable input-output hysteresis behavior of the two lasing wavelengths evolves in antiphase. The bistable region is tens of milliwatts wide. The bistability is essentially due to the homogeneous saturable absorption of EDF. The cross-gain saturation causes the bistabilities of the two lasing lines to evolve in antiphase with respect to each other. The gain clamping effect helps to widen the bistable region, which may be controlled by the cavity loss and by the EDF length.     

基于非线性流形学习的人脸面部运动估计

由于人脸面部运动变化分布在一个低维非线性流形中,基于线性假设的主动外观模型采用主成分分析算法描述人脸形状的变化必然带来额外的估计误差.为降低或消除这一误差,该文提出一种改进的局部线性嵌入算法构建人脸形状-纹理空间,并将其应用于主动外观模型中.实验结果表明,不仅对于面部形变不大的人脸形状,局部线性嵌入-主动外观模型拥有更...     

A dual quad-tree based variable block-size coding method

Recent video coding standards with hybrid structure adopt variable block-size processing techniques including variable block-size motion estimation and compensation, variable block-size intra prediction, and variable block-size transform. This paper gives analysis on the variable block-size techniques based on software simulations, and variable block-size transform is specially studied. As a result of the analysis, a generalized dual quad-tree based variable block-size coding (DQTC) structure is proposed. This structure also shows good flexibility and expansibility, in which the prediction block-size set and the transform block-size set can be configured according to requirements and the implementation complexity constraints. Simulation results show a considerable performance improvement for the proposed structure with low implementation complexity while the coding block-size sets and parameters are optimized.     

基于VB的主从机串行通信系统设计

串行通信是数据采集系统中最常用的通信手段之一。设计并研制了基于VB的LED大屏幕显示串行数据通信系统,具有编程灵活、控制通信对象容易的优点。通过8250的奇偶校验位与单片机的SM2位的配合,实现了PC机与多个单片机的串行数据通信。介绍了基于VB6.0进行串行通信的流程和编程,较好地解决了同时使用通信方式0与方式1时引起的RXD端口的冲突问题。实验证明,该设计简单、实用,提高了系统设计的效率。