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93.
Variable Impedance Actuators (VIA) have received increasing attention in recent years as many novel applications involving interactions with an unknown and dynamic environment including humans require actuators with dynamics that are not well-achieved by classical stiff actuators. This paper presents an overview of the different VIAs developed and proposes a classification based on the principles through which the variable stiffness and damping are achieved. The main classes are active impedance by control, inherent compliance and damping actuators, inertial actuators, and combinations of them, which are then further divided into subclasses. This classification allows for designers of new devices to orientate and take inspiration and users of VIA’s to be guided in the design and implementation process for their targeted application.  相似文献   
94.
We present a black-box active learning algorithm for inferring extended finite state machines (EFSM)s by dynamic black-box analysis. EFSMs can be used to model both data flow and control behavior of software and hardware components. Different dialects of EFSMs are widely used in tools for model-based software development, verification, and testing. Our algorithm infers a class of EFSMs called register automata. Register automata have a finite control structure, extended with variables (registers), assignments, and guards. Our algorithm is parameterized on a particular theory, i.e., a set of operations and tests on the data domain that can be used in guards.Key to our learning technique is a novel learning model based on so-called tree queries. The learning algorithm uses tree queries to infer symbolic data constraints on parameters, e.g., sequence numbers, time stamps, identifiers, or even simple arithmetic. We describe sufficient conditions for the properties that the symbolic constraints provided by a tree query in general must have to be usable in our learning model. We also show that, under these conditions, our framework induces a generalization of the classical Nerode equivalence and canonical automata construction to the symbolic setting. We have evaluated our algorithm in a black-box scenario, where tree queries are realized through (black-box) testing. Our case studies include connection establishment in TCP and a priority queue from the Java Class Library.  相似文献   
95.
Droplet-based microfluidic allows high throughput experimentation in with low volume droplets. Essential fluidic process steps are on the one hand the proper control of the droplet composition and on the other hand the droplet processing, manipulation and storage. Beside integrated fluidic chips, standard PTFE-tubings and fluid connectors can be used in combination with appropriate pumps to realize almost all necessary fluidic processes. The segmented flow technique usually operates with droplets of about 100–500 nL volume. These droplets are embedded in an immiscible fluid and confined by channel walls. For the integration of segmented flow applications in established research workflows—which are usually base on microtiter plates—robotic interface tools for parallel/serial and serial/parallel transfer operations are necessary. Especially dose–response experiments are well suited for the segmented flow technique. We developed different transfer tools including an automated “gradient take-up tool” for the generation of segment sequences with gradually changing composition of the individual droplets. The general working principles are introduced and the fluidic characterizations are given. As exemplary application for a dose–response experiment the inhibitory effect of antibiotic tetracycline on Escherichia coli bacteria cultivated inside nanoliter droplets was investigated.  相似文献   
96.
Hardware accelerators such as GPUs or Intel Xeon Phi comprise hundreds or thousands of cores on a single chip and promise to deliver high performance. They are widely used to boost the performance of highly parallel applications. However, because of their diverging architectures programmers are facing diverging programming paradigms. Programmers also have to deal with low-level concepts of parallel programming that make it a cumbersome task. In order to assist programmers in developing parallel applications Algorithmic Skeletons have been proposed. They encapsulate well-defined, frequently recurring parallel programming patterns, thereby shielding programmers from low-level aspects of parallel programming. The main contribution of this paper is a comparison of two skeleton library implementations, one in C++ and one in Java, in terms of library design and programmability. Besides, on the basis of four benchmark applications we evaluate the performance of the presented implementations on two test systems, a GPU cluster and a Xeon Phi system. The two implementations achieve comparable performance with a slight advantage for the C++ implementation. Xeon Phi performance ranges between CPU and GPU performance.  相似文献   
97.
By complementation screening of a cadmium-sensitive Schizosaccharomyces pombe mutant deficient in phytochelatin synthesis, but with 44% of the wild-type glutathione content, we cloned a DNA fragment involved in phytochelatin synthesis. Sequence analysis revealed that it encodes the second enzyme involved in glutathione (GSH) biosynthesis, glutathione synthetase (GSH2) (E.C.6.3.2.3, Wang and Oliver, 1997). The mutant allele shows a single base-pair exchange at the 3' end of the reading frame leading to a single amino acid change from glycine to aspartate. This mutation leads to a significant reduction of phytochelatin synthesis, whereas glutathione synthesis is impaired to a far lesser extent. Complementation with the Arabidopsis thaliana GSH2 cDNA led to a partial restoration of phytochelatin synthesis. These data strongly suggest that the GSH2 gene encodes a bifunctional enzyme that is able to catalyse both the synthesis of GSH by adding glycine to the dipeptide (gammaGlu-Cys) and the synthesis of phytochelatins. The sequence has been submitted to EMBL, Accession No. Y08414.  相似文献   
98.
Functionalized magnetic microspheres have promising applications in different microfluidic devices including MEMS-scale biosensors. These particles exhibit magnetic field-induced aggregation, which can be harnessed to achieve several practical tasks in microfluidic devices. For this, the particle aggregation needs to be well characterized. Herein, a numerical simulation and experimental validation of particle-chaining is presented. Simulations show that the particle aggregation time scales linearly with a group parameter. The predicted growth of one- two- and three-particle chains with time shows a similar trend as that found in the experiments. The results of the study could help predicting the performance of magnetic aggregate-based lab-on-a-chip devices.  相似文献   
99.
Rapidly increasing numbers of applications and users make the development of mobile applications to one of the most promising fields in software engineering. Due to short time to market, differing platforms, and fast emerging technologies, mobile application development faces typical challenges where model-driven development (MDD) can help. We present a modeling language and an infrastructure for the MDD of native apps in Android and iOS. Our approach allows a flexible app development on different abstraction levels: compact modeling of standard app elements such as standard data management and increasingly detailed modeling of individual elements to cover, for example, specific behavior. Moreover, a kind of variability modeling is supported such that mobile apps with variants can be developed. We demonstrate our MDD approach with several apps including a conference app, a museum guide with augmented reality functionality, and a SmartPlug.  相似文献   
100.
To provide a variety of new and advanced communications services, computer networks are required to perform increasingly complex packet processing. This processing typically takes place on network routers and their associated components. An increasingly central component in router design is a chip-multiprocessor (CMP) referred to as "network processor" or NP. In addition to multiple processors, NPs have multiple forms of on-chip memory, various network and off-chip memory interfaces, and other specialized logic components such as CAMs (content addressable memories). The design space for NPs (e.g., number of processors, caches, cache sizes, etc.) is large due to the diverse workload, application requirements, and system characteristics. System design constraints relate to the maximum chip area and the power consumption that are permissible while achieving defined line rates and executing required packet functions. In this paper, an analytic performance model that captures the processing performance, chip area, and power consumption for a prototypical NP is developed and used to provide quantitative insights into system design trade offs. The model, parameterized with a networking application benchmark, provides the basis for the design of a scalable, high-performance network processor and presents insights into how best to configure the numerous design elements associated with NPs.  相似文献   
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