C-t analysis of MOS capacitors under constant current stress

The effect of high oxide field stress is studied using capacitance-time (C-t) measurements of MOS capacitors. The stress results in parallel shifts of the C-t curve along the time axis. The flatband voltage shift ΔV_FB obtained from the initial deep depletion capacitance C(t=0⁺) follows the same trend as that from the high-frequency C-V characteristics. However, the discrepancy between the two flatband voltages becomes larger as the stress increases due to the effect of interface charges on C-t characteristics. The flatband voltage difference is converted to interface trap density, showing a steady increase of interface trap density with stress, similar to that from low-frequency C-V measurements     

A fully soft-switched extended-period quasi-resonantpower-factor-correction circuit

This paper presents the design criteria, procedure, and implementation of a soft-switched power-factor-correction (PFC) circuit based on the extended-period quasi-resonant (EPQR) principles. All power electronic devices including switches and diodes in the circuit are fully soft switched. The design method is demonstrated in a prototype circuit. The operating principles are confirmed with computer simulation and experimental results. A comparison of the EP-QR operation and zero-voltage-transition (ZVT) pulse-width modulation (PWM) method     

A closed form theory for calibrating a dual six-port networkanalyzer

The application of a general self-calibration procedure, the so-called TNA (through, network, attenuator) method, to a dual six-port network analyzer is presented for the first time. This innovation results from strictly separating the establishment of the complex measurement ability and the determination of the analyzers system error parameters. As will be seen, the well-known TRL (through, reflect, line) method is a special case of the general TNA technique     

Application of neural networks and machine learning in networkdesign

Communication network design is becoming increasingly complex, involving making networks more usable, affordable, and reliable. To help with this, we have proposed an expert network designer (END) for configuring, modeling, simulating, and evaluating large structured computer networks, employing artificial intelligence, knowledge representation, and network simulation tools. We present a neural network/knowledge acquisition machine-learning approach to improve the END's efficiency in solving the network design problem and to extend its scope to acquire new networking technologies, learn new network design techniques, and update the specifications of existing technologies     

Densification involved in the UV-based photosensitivity of silicaglasses and optical fibers

A comprehensive survey of photosensitivity in silica glasses and optical fiber is reviewed. Recent work on understanding the mechanisms contributing to germanium or aluminum doped fiber photosensitivity is discussed within the framework of photoelastic densification models     

Digitally tunable optical filters using arrayed-waveguide grating(AWG) multiplexers and optical switches

Two novel configurations for digitally tunable optical filters based on arrayed-waveguide grating (AWG) multiplexers are described in detail with emphasis on the connection of the AWG multiplexer and optical switches. Performance comparisons show that conventional configurations are disadvantaged by the switch size required and loss imbalance among the optical frequency-division-multiplexed (FDM) channels; the proposed configurations require only O(√(N)) switch elements to select one of N FDM channels, and the loss imbalance is lower by up to 75% in decibel     

A new lateral MOS-gated thyristor with controlling base-current

A new lateral MOS-gated thyristor, called the Base-Current-Controlled Thyristor, is described. This device is designed so that most holes at the on-stage reach the P base through the floating P⁺ region adjacent to the P base and the on-state MOSFET. At the turn-off stage, the interruption of the hole current to the P base due to switching off the above MOSFET occurs simultaneously with the conventional turn-off operation. The concept of this device is verified experimentally by using the fabricated lateral device with the external MOSFET. This device exhibits a better trade-off relation between the on-state voltage and the turn-off time compared uith the conventional MOS-gated thyristor     

Series equivalence/operation of current-controlled boost-typesingle-phase voltage source converters for bidirectional power flow

Single-phase voltage source power converters (VSCs) under consideration are AC-DC current-controlled boost-type power converters with bidirectional power-handling capability. Equivalence between two series-connected two-level power converters and a single three-level power converter is considered here. Further considered is the series operation of three-level power converters. Simulation results and experimental verification for both are provided. Economical configurations of three-level power converters leading to multilevel waveforms are presented thereafter     

A wafer level monitoring method for plasma-charging damage usingantenna PMOSFET test structure

A novel monitoring method for plasma-charging damage is proposed. This method performs a quick and accurate evaluation using antenna PMOSFET. It was found that not only hot-carrier (HC) lifetime but transistor parameters such as initial gate current and substrate current were changed according to the degree of plasma-charging damage. However, the present work suggests that monitoring the shift of drain current after a few seconds of HC stress is a more accurate method to indicate plasma-charging damage. The monitoring method using the present test structure is demonstrated to be useful for realizing highly reliable devices     

Reduction of sodium-accelerated oxidation of silicon nitride ceramics by aluminium implantation

Norton NBD 200 silicon nitride ceramics were implanted with sodium to a dose of 7.0×10¹⁵cm^-2 at 72 keV (1 at% peak sodium content at 100 nm). The sodium-implanted samples were further implanted with aluminium to 7.3×10¹⁵cm^-2 at 87 keV (1 at% peak aluminium content at 100 nm). The implanted and unimplanted samples were oxidized in 1 atm dry oxygen at 1100 and 1300°C for 2–6 h. Profilometry and scanning electron microscopy measurements indicated that sodium implantation led to up to a two-fold increase in the oxidation rate of silicon nitride. The sodium effect was effectively neutralized when aluminium was co-implanted. The opposite effects of sodium and aluminium on the oxidation resistance of silicon nitride can be attributed to their different roles in modifying the structure and properties of the oxide formed. This revised version was published online in November 2006 with corrections to the Cover Date.