Large-Scale Synthesis of Graphene Films by Joule-Heating-Induced Chemical Vapor Deposition

We report large-area synthesis of few-layer graphene films by chemical vapor deposition (CVD) in a cold-wall reactor. The key feature of this method is that the catalytic metal layers on the SiO₂/Si substrates are self-heated to high growth temperature (900°C to 1000°C) by high-current Joule heating. Synthesis of high-quality graphene films, whose structural and electrical characteristics are comparable to those grown by hot-wall CVD systems, was confirmed by transmission electron microscopy images, Raman spectra, and current–voltage analysis. Optical transmittance spectra of the graphene films allowed us to estimate the number of graphene layers, which revealed that high-temperature exposure of Ni thin layers to a carbon precursor (CH₄) was critical in determining the number of graphene layers. In particular, exposure to CH₄ for 20 s produces very thin graphene films with an optical transmittance of 93%, corresponding to an average layer number of three and a sheet resistance of ~600 Ω/square.     

Relations among Security Models for Authenticated Key Exchange

Usually, key‐establishment protocols are suggested in a security model. However, there exist several different security models in the literature defined by their respective security notions. In this paper, we study the relations between the security models of key establishment. For the chosen security models, we first show that some proven key‐establishment protocols are not secure in the more restricted security models. We then suggest two compilers by which we can convert a key‐establishment protocol that is secure in a specific security model into a key‐establishment protocol that is still secure in a more restricted security model.     

Thin-Film Thermoelectric Module for Power Generator Applications Using a Screen-Printing Method

A new process for fabricating a low-cost thermoelectric module using a screen-printing method has been developed. Thermoelectric properties of screen-printed ZnSb films were investigated in an effort to develop a thermoelectric module with low cost per watt. The screen-printed Zn _x Sb_1−x films showed a low carrier concentration and high Seebeck coefficient when x was in the range of 0.5 to 0.57 and the annealing temperature was kept below 550°C. When the annealing temperature was higher than 550°C, the carrier concentration of the Zn _x Sb_1−x films reached that of a metal, leading to a decrease of the Seebeck coefficient. In the present experiment, the optimized carrier concentration of screen-printed ZnSb was 7 × 10¹⁸/cm³. The output voltage and power density of the ZnSb film were 10 mV and 0.17 mW/cm², respectively, at ΔT = 50 K. A thermoelectric module was produced using the proposed screen-printing approach with ZnSb and CoSb₃ as p-type and n-type thermoelectric materials, respectively, and copper as the pad metal.     

Monolithic distributed amplifier with active control schemes for optimum gain and group-delay flatness, bandwidth, and stability

In this paper, active control schemes are presented to optimize the performance of the distributed amplifier (DA) subject to the process variation. A detailed analysis of the DA with mismatched termination loads has been performed, which reveals that pronounced gain and group-delay ripple arises at the low-frequency end from the reflected waves in the artificial transmission line. To solve this problem, an active variable resistor is proposed as the gate-line termination load. The gain and stability of the cascode DA has also been analyzed, which identifies the most critical component determining the tradeoff between the gain-bandwidth product (GBP) and the stability to be the gate feedback resistor of common-gate field-effect transistor. It is also replaced with the active resistor to maximize GBP, while avoiding oscillations. A nine-section cascode DA with active control features is designed and fabricated using commercial GaAs pseudomorphic high electron-mobility transistor foundry. The measurement shows that the gain and group-delay ripple can be minimized, and GBP can be maximized without oscillations by the active bias controls. Active control schemes allow the monolithic DAs to be fine tuned after the fabrication and, thus, can be a robust DA design methodology against process variation and inaccurate device models.     

Fine‐Grained FSMD Power Gating Considering Power Overhead

As a fine‐grained power gating method for achieving greater power savings, our approach takes advantage of the finite state machine with a datapath (FSMD) characteristic which shows sequential idleness among subcircuits. In an FSMD‐based power gating, while only an active subcircuit is expected to be turned on, more subcircuits should be activated due to the power overhead. To reduce the number of missed opportunities for power savings, we deactivated some of the turned‐on subcircuits by slowing the FSMD down and predicting its behavior. Our microprocessor experiments showed that the power savings are close to the upper bound.     

A 2-Gbaud 0.7-V swing voltage-mode driver and on-chip terminatorfor high-speed NRZ data transmission

A large-swing, voltage-mode driver and an on-chip termination circuit are presented for high-speed nonreturn-to-zero (NRZ) data transmission through a copper cable. The proposed driver with active pull-up and pull-down can generate a 700-mV signal to deliver a 2 Gbaud serial NRZ data stream. Low output impedance offered by simple negative-feedback resistors alleviates the detrimental effect of the parasitic capacitance by supplying fast current impulses. A proposed on-chip termination circuit provides termination impedance to a mid-supply termination voltage with the benefit of reduced parasitic capacitance and better termination characteristics compared with off-chip termination. The driver and termination circuits have been incorporated in a 2 Gbaud transceiver chip and fabricated in 0.35 μm CMOS technology. Measurements show a 1.4 V differential swing with a slew rate of 2.5 V/ns at the receiver output and a 65% reduction of reflection by the on-chip termination circuit with power consumption of 191 mW at 3.3 V supply     

All‐Carbon Nanotube‐Based Flexible Field‐Emission Devices: From Cathode to Anode

The fabrication of a flexible field‐emission device (FED) using single‐walled carbon nanotube (SWNT) network films as the conducting electrodes (anode and cathode) and thin multi‐walled CNT/TEOS hybrid films as the emitters is reported. P‐type doping with gold ions and passivation with tetraethylorthosilicate (TEOS) made the SWNT network film highly conductive and environmentally stable, and hence a good alternative to conventional indium tin oxide electrodes. CNT/TEOS hybrid emitters showed high current density, low turn‐on field, and long‐term emission stability, compared with CNT emitters; these characteristics can be attributed to the TEOS sol, acting both as a protective layer surrounding the nanotube tip, and as an adhesive layer enhancing the nanotube adhesion to the substrate. All‐CNT‐based flexible FEDs fabricated by this approach showed high flexibility in field emission characteristics and extremely bright electron emission patterns.     

Theoretical analysis of cladding-mode waveguide dispersion and its effects on the spectra of long-period fiber grating

A new method to control the free spectral range (FSR) of a long-period fiber grating (LPFG) is proposed and theoretically analyzed. As the refractive index decreases radially outward in the silica cladding by graded doping of fluorine, waveguide dispersion in the cladding modes was modified to result in the effective indexes change and subsequently the phase-matching conditions for coupling with the core mode in a LPFG. Enlargement of the FSR in a LPFG was theoretically confirmed.     

A new method to suppress harmonics using /spl lambda//4 bias line combined by defected ground structure in power amplifiers

A new /spl lambda//4 bias line combined by a dumb-bell shaped defected ground structure (DGS) is proposed to suppress harmonics in power amplifiers. The proposed DGS bias line maintains the required high impedance even after DGS is inserted, while the width and length of the /spl lambda//4 bias line are broader and shorter than those of conventional bias lines. When the DGS bias line is used in power amplifiers, the third harmonic components as well as the second harmonic are reduced, because of the increased slow-wave effect over wide harmonic band. It is shown that the reduction of the third harmonic component, the improvement of 1 dB compression point, and power added efficiency are 26.5 dB, 0.45 dB, and 9.1%, respectively.