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91.
A mixed K-value model allows existing computer programs for the simulation of vapor-liquid equilibrium stages to be used for three-phase vapor-liquid-liquid systems. The mixed K-value model has been implemented with a minimum effort into the Badger General Material Balance flow-sheeting program. Good convergence has been obtained with the mixed K-value model for a number of systems. A comparison is made with published literature [1, 2], showing excellent results with this generally applicable and easy-to-use method. 相似文献
92.
93.
Incremental transmission loss analysis has been used for decades, but recent interest in its application to loss allocation calls for new in-depth results. This paper demonstrates that, for incremental methods to be applied correctly in loss allocation, it is first necessary to specify the load distribution and loss supply strategies. Incremental loss allocation among bus power injections is shown to be arbitrary and, therefore, open to challenge as discriminatory. Loss allocation is possible among incremental loads and/or generators, but the proportion of the total losses assigned to either one is arbitrary. Unique, nonarbitrary incremental loss allocations are however possible among the "equivalent" incremental bilateral exchanges between generators and loads. From these basic components it is possible then to calculate the allocation among generators or loads in any specified proportion. The main results, although developed initially for small increments, are extended to large variations. Finally, a general incremental loss allocation algorithm is developed and tested 相似文献
94.
B. A. Afanas'ev E. P. Vinogradova G. F. Smirnov 《Journal of Engineering Physics and Thermophysics》1985,49(4):1185-1191
The article presents the results of experimental investigations of critical (limit) heat fluxes upon evaporation on porous coatings, and it substantiates the physical model of the process.Translated from Inzhenerno-Fizicheskii Zhurnal, Vol. 49, No. 4, pp. 607–614, October, 1985. 相似文献
95.
96.
Troya A. Maharatna K. Krstic M. Grass E. Jagdhold U. Kraemer R. 《IEEE transactions on circuits and systems. I, Regular papers》2008,55(2):672-686
In this paper, we propose low-power designs for the synchronizer and channel estimator units of the Inner Receiver in wireless local area network systems. The objective of the work is the optimization, with respect to power, area, and latency, of both the signal processing algorithms themselves and their implementation. Novel circuit design strategies have been employed to realize optimal hardware and power efficient architectures for the fast Fourier transform, arc tangent computation unit, numerically controlled oscillator, and the decimation filters. The use of multiple clock domains and clock gating reduces the power consumption further. These blocks have been integrated into an experimental digital baseband processor for the IEEE 802.11a standard implemented in the 0.25mum- 5-metal layer BiCMOS technology from Institute for High Performance Microelectronics. 相似文献
97.
98.
Ploennigs J. Neugebauer M. Kabitzsch K. 《Industrial Informatics, IEEE Transactions on》2008,4(2):71-79
Network performance engineering can verify the design and dimensioning of large-scale control networks like CSMA-based building automation networks. It combines performance analysis with diagnosis methods to evaluate the network utilization and to detect design errors before installation and can therewith save the expenses of overdimensioning and redesign. This paper will develop a diagnosis model based on fault trees that is able to use the huge amount of performance analysis results to identify design errors and analyze their coherences. This enables not only a fast tracing back of fault causes and the derivation of solutions; it can also visualize the fault coherence to the user and help him to understand his design. Additional consulting tools implement best practice strategies, to support the user in parameterization. 相似文献
99.
Su M.F. Reda Taha M.M. Christodoulou C.G. El Kady I. 《Photonics Technology Letters, IEEE》2008,20(10):761-763
Processing methods used in photonics and nanotechnology possess many limitations restricting their application areas such as high cost, inability to produce fine details, problems with scalability, and long processing time. Proximity field nanopatterning is a lithography method which surpasses these limitations. By using interference patterns produced by a two-dimensional phase mask, the technique is able to generate a submicron detailed exposure on a millimeter-size slab of light sensitive photopolymer, which is then developed like a photographic plate to reveal three-dimensional interference patterns from the phase mask. While it is possible to use simulations to obtain the interference patterns produced by a phase mask, realizing the mask dimensions necessary for producing a desired interference pattern is analytically challenging due to the intricacies of light interactions involved in producing the final interference pattern. An alternative method is to iteratively optimize the phase mask until the interference patterns obtained converge to the desired pattern. However, depending on the optimization technique used, one either risks a significant probability of failure or requires a prohibitive number of iterations. We argue that an optimization technique that is to take advantage of the physics of the problem using machine learning methods (here fuzzy learning) can lead to competent mask design. This technique is described in this letter. 相似文献
100.
A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC 总被引:1,自引:0,他引:1
Min Gyu Kim Gil-Cho Ahn Hanumolu P.K. Sang-Hyeon Lee Sang-Ho Kim Seung-Bin You Jae-Whui Kim Temes G.C. Un-Ku Moon 《Solid-State Circuits, IEEE Journal of》2008,43(5):1195-1206
A 0.9 V third-order double-sampled delta-sigma audio ADC is presented. A new method using a combination of a switched-RC technique and a floating switched-capacitor double-sampling configuration enabled low-voltage operation without clock boosting or bootstrapping. A three-level quantizer with simple dynamic element matching was used to improve linearity. The prototype IC implemented in a 0.13 CMOS process achieves 92 dB DR, 91 dB SNR and 89 dB SNDR in a 24 kHz audio signal bandwidth, while consuming 1.5 mW from a 0.9 V supply. The prototype operates from 0.65 V to 1.5 V supply with minimal performance degradation. 相似文献