Extremely narrow spectral linewidth and low chirping of theMQW-DFB-PPIBH laser diode

The low threshold current of 9 mA, the high side-mode suppression ratio of more than 45 dB, the extremely narrow spectral linewidth of 1.1 MHz, and the low chirping of 2.8 Å at -20 dB at 2 Gb/s nonreturn to zero (NRZ) modulation have been achieved in the multiple quantum well (MQW) distributed feedback (DFB) p-substrate partially inverted buried heterostructure (PPIBH) laser diode. The spectral linewidth of 1.1 MHz is the narrowest value among 300-μm-length solitary laser diodes. These results suggest that the MQW-DFB laser diodes are a promising light source for longer distance and higher bit-rate optical communication systems and coherent optical communication systems     

A 146-mm/sup 2/ 8-gb multi-level NAND flash memory with 70-nm CMOS technology

An 8-Gb multi-level NAND Flash memory with 4-level programmed cells has been developed successfully. The cost-effective small chip has been fabricated in 70-nm CMOS technology. To decrease the chip size, a one-sided pad arrangement with compacted core architecture and a block address expansion scheme without block redundancy replacement have been introduced. With these methods, the chip size has been reduced to 146 mm/sup 2/, which is 4.9% smaller than the conventional chip. In terms of performance, the program throughput reaches 6 MB/s at 4-KB page operation, which is significantly faster than previously reported and very competitive with binary Flash memories. This high performance has been achieved by the combination of the multi-level cell (MLC) programming with write caches and with the program voltage compensation technique for neighboring select transistors. The read throughput reaches 60 MB/s using 16I/O configuration.     

Direct Growth of Germanene at Interfaces between Van der Waals Materials and Ag(111)

Germanene, a 2D honeycomb germanium crystal, is grown at graphene/Ag(111) and hexagonal boron nitride (h-BN)/Ag(111) interfaces by segregating germanium atoms. A simple annealing process in N₂ or H₂/Ar at ambient pressure leads to the formation of germanene, indicating that an ultrahigh-vacuum condition is not necessary. The grown germanene is stable in air and uniform over the entire area covered with a van der Waals (vdW) material. As an important finding, it is necessary to use a vdW material as a cap layer for the present germanene growth method since the use of an Al₂O₃ cap layer results in no germanene formation. The present study also proves that Raman spectroscopy in air is a powerful tool for characterizing germanene at the interfaces, which is concluded by multiple analyses including first-principles density functional theory calculations. The direct growth of h-BN-capped germanene on Ag(111), which is demonstrated in the present study, is considered to be a promising technique for the fabrication of future germanene-based electronic devices.     

Characterization of plasma membrane H+-ATPase from salt-tolerant yeast Candida versatilis

Plasma membrane was isolated from the salt-tolerant yeast Candida versatilis and the ATPase in plasma membrane was characterized. The ATPase was a typical H⁺-ATPase with similar properties to the Saccharomyces cerevisiae and Zygosaccharomyces rouxii enzymes. It was reacted with antibody (IgG) raised against S. cerevisiae plasma membrane H⁺-ATPase. The ATPase activity was not changed by adding NaCl and KCl to the assay solutions, but was increased by NH, especially by ammonium sulfate. In vivo stimulation of ATPase activity was observed by the addition of NaCl into the culture medium, as observed in Z. rouxii. No in vivo activation of H⁺-ATPase by glucose metabolism was observed in C. versatilis cells and the activity was independent of the growth phase, like Z. rouxii and unlike S. cerevisiae cells.     

Absorption saturation mechanism in short-period GaAs/AlAs superlattice self-electro-optic effect devices based on Wannier-Stark localization

We have studied absorption saturation characteristics in short-period GaAs/AlAs superlattice self-electro-optic effect devices based on Wannier-Stark localization. The disappearance of negative differential resistances due to absorption saturation was observed under high optical excitation intensities. To understand the mechanism, we measured the time-resolved photocurrent and time-resolved photoluminescence. Results revealed that the absorption saturation is caused by electric field screening originating from the space-charge of remaining holes due to effective mass filtering.     

Absorption loss coefficient of the active layer for 1.48-μm bulkand MQW lasers

It is shown that the absorption loss coefficient of the active layer for 1.48-μm bulk lasers is 66 cm^-1 which is between 45 and 107 cm^-1 for 1.3-μm bulk lasers and for 1.55-μm bulk lasers, respectively. It is also described that the absorption loss coefficient of the active layer for 1.48-μm multiple-quantum-well (MQW) lasers is 28 cm^-1 which is about two-fifths of that for 1.48-μm bulk lasers. Therefore, the high slope efficiency of the 1.48-μm MQW lasers is attributed not only to the small optical confinement factor but also to the small absorption loss coefficient of the active layer     

A real-time motion estimation and compensation LSI with wide searchrange for MPEG2 video encoding

This paper presents a motion estimation and compensation large scale integration (LSI) for the MPEG2 standard. An embedded RISC processor and special hardware modules enable the LSI to achieve a sufficient ability to perform real-time operation and provide the availability to realize many kinds of block matching algorithms. Using a three-step hierarchical telescopic search algorithm, a single chip accomplishes real-time motion estimation with search ranges of ±32.5×±32.5 pixels for motion vectors. The chip was fabricated using 0.5-μm CMOS technology and has an area of 16.5×16.5 mm² and 2.0 M transistors     

A 286 mm2 256 Mb DRAM with ×32 both-ends DQ

This paper describes a 256 Mb DRAM chip architecture which provides up to ×32 wide organization. In order to minimize the die size, three new techniques: an exchangeable hierarchical data line structure, an irregular sense amp layout, and a split address bus with local redrive scheme in the both-ends DQ were introduced. A chip has been developed based on the architecture with 0.25 μm CMOS technology. The chip measures 13.25 mm×21.55 mm, which is the smallest 256 Mb DRAM ever reported. A row address strobe (RAS) access time of 26 ns was obtained under 2.8 V power supply and 85°C. In addition, a 100 MHz×32 page mode operation, namely 400 M byte/s data rate, in the standard extended data output (EDO) cycle has been successfully demonstrated     

An experimental 1.5-V 64-Mb DRAM

Low-voltage circuit technologies for higher-density dynamic RAMs (DRAMs) and their application to an experimental 64-Mb DRAM with a 1.5-V internal operating voltage are presented. A complementary current sensing scheme is proposed to reduce data transmission delay. A speed improvement of 20 ns was achieved when utilizing a 1.5-V power supply. An accurate and speed-enhanced half-V_CC voltage generator with a current-mirror amplifier and tri-state buffer is proposed. With it, a response time reduction of about 1.5 decades was realized. A word-line driver with a charge-pump circuit was developed to achieve a high boost ratio. A ratio of about 1.8 was obtained from a power supply voltage as low as 1.0 V. A 1.28 μm² crown-shaped stacked-capacitor (CROWN) cell was also made to ensure a sufficient storage charge and to minimize data-line interference noise. An experimental 1.5 V 64 Mb DRAM was designed and fabricated with these technologies and 0.3 μm electron-beam lithography. A typical access time of 70 ns was obtained, and a further reduction of 50 ns is expected based on simulation results. Thus, a high-speed performance, comparable to that of 16-Mb DRAMs, can be achieved with a typical power dissipation of 44 mW, one tenth that of 16-Mb DRAMs. This indicates that a low-voltage battery operation is a promising target for future DRAMs