CML-type MOnostable BIstable logic element (MOBILE) using InP-based monolithic RTD/HBT technology

A new CML-type monostable/bistable logic element IC is fabricated using monolithically integrated resonant tunnelling diodes (RTDs) and InP/InGaAs heterojunction bipolar transistors (HBTs). The D-flip-flop function of the fabricated circuit is confirmed up to 20 Gbit/s at room temperature. This result indicates the potential of the RTD/HBT technology for high-speed logic applications.     

A fully differential LC-VCO using a new varactor control structure

This paper presents a fully differential inductor-capacitor voltage-controlled oscillator (LC-VCO) with a new differentially-tuned varactor structure. The proposed LC-VCO has lower phase noise and better robustness to the injected common-mode noise than the differentially-tuned LC-VCO using the previous antiparallel structure. The LC-VCO implemented using 0.5-/spl mu/m SiGe BiCMOS technology is tunable from 4.251 to 4.428 GHz and the measured phase noise is -119 dBc/Hz at 1-MHz offset over the entire tuning range. Its core current is only 1.7 mA at 2.5-V supply voltage.     

An InGaAs-InP HBT differential transimpedance amplifier with 47-GHz bandwidth

Return-to-zero differential phase-shift keying applications require a differential amplifier with high bandwidth, high gain, low noise, and good input impedance match. In this paper, we describe an InGaAs-InP heterostructure bipolar transistor differential transimpedance amplifier with high bandwidth of 47 GHz and high gain of 56 dB-/spl Omega/. The input-referred current noise is less than 35 pA//spl radic/Hz over the measurement range up to 40 GHz.     

Improved performance of Si-based spiral inductors

Conventional spiral inductors on silicon wafer have suffered low quality (Q) factor due to substrate loss. In this work, a technique that combines optimized shielding poly and proton implantation treatment is utilized to improve inductor Q-value. The optimized poly-silicon and proton-bombarded substrate have added 37% and 54% increment to the Q-value of inductors, respectively. If two techniques are combined, a phenomenal Q-value increment as high as 122% of 4-nH spiral inductors can be realized. The combination of the two means has created a multiplication of their individual contribution rather than addition. The technique used in this work shall become a critical measure to put inductors on silicon substrate with satisfactory performance for Si-based radio frequency integrated circuit applications.     

SOSP: an efficient multicast fault isolation scheme for multi-source sessions

This paper proposes a one-way source probing mechanism for fault isolation in multi-source multicast sessions. Routers involved in multicast record a routing path based on periodic probes from sources, and receivers isolate a fault region using the probes. We introduce a probe suppression mechanism to enhance the performance. The proposed scheme reduces message complexity and enhances fault isolation latency, which improves scalability. Furthermore, an analytical formula is proposed to estimate suppression time, which provides maximum performance for a given network status.     

A fully integrated 24-dBm CMOS power amplifier for 802.11a WLAN applications

A fully integrated 24-dBm complementary metal oxide semiconductor (CMOS) power amplifier (PA) for 5-GHz WLAN applications is implemented using 0.18-/spl mu/m CMOS foundry process. It consists of differential three-stage amplifiers and fully integrated input/output matching circuits. The amplifier shows a P/sub 1/ of 21.8 dBm, power added efficiency of 13%, and gain of 21 dB, respectively. The saturated output power is above 24.1 dBm. This shows the highest output power among the reported 5-GHz CMOS PAs as well as completely satisfying IEEE 802.11a transmitter back off requirement.     

A dry-patterned Cu(Mg) alloy film as a gate electrode in a thin-film transistor liquid crystal display

The annealing of a Cu(4.5at.%Mg)/SiO₂/Si structure in ambient O₂ at 10 mtorr and 300–500°C allows for the out-diffusion of the Mg to the Cu surface, forming a thin MgO (15 nm) layer on the surface. The surface MgO layer was patterned and successfully served as a hard mask for the subsequent dry etching of the underlying Mg-depleted Cu films using an O₂ plasma and hexafluoroacetylacetone (H(hfac)) chemistry. The resultant MgO/Cu structure, with a taper slope of about 30°, shows the feasibility of dry etching of Cu(Mg) alloy films using a surface MgO mask scheme. A dry-etched Cu(4.5at.%Mg) gate a-Si:H thin-film transistor (TFT) has a field-effect mobility of 0.86 cm²/Vs, a subthreshold swing of 1.08 V/dec, and a threshold voltage of 5.7 V. A novel process for the dry etching of Cu(Mg) alloy films that eliminates the use of a hard mask, such as Ti, and results in a reduction in the process steps is reported for the first time in this work.     

New Insight into Microstructure Engineering of Ni-Rich Layered Oxide Cathode for High Performance Lithium Ion Batteries

Ni-rich layered LiNi_xCo_yMn_1−x−yO₂ (LNCM) with Ni content over >90% is considered as a promising lithium ion battery (LIB) cathode, attributed by its low cost and high practical capacity. However, Ni-rich LNCM inevitably suffers rapid capacity fading at a high state of charge due to the mechanochemical breakdown; in particular, the microcrack formation has been regarded as one of the main culprits for Ni-rich layered cathode failure. To address these issues, Ni-rich layered cathodes with a textured microstructure are developed by phosphorous and boron doping. Attributed by the textured morphology, both phosphorous- and boron-doped cathodes suppress microcrack formation and show enhanced cycle stability compared to the undoped cathode. However, there exists a meaningful capacity retention difference between the doped cathodes. By adapting the various analysis techniques, it is shown that the boron-doped Ni-rich layered cathode displays better cycle stability not only by its ability to suppress microcracks during cycling but also by its primary particle morphology that is reluctant to oxygen evolution. The present work reveals that not only restraint of particle cracks but also suppression of oxygen release by developing the oxygen stable facets is important for further improvements in state-of-the-art Li ion battery Ni-rich layered cathode materials.     

Enhanced Optical Properties and Stability of CsPbBr3 Nanocrystals Through Nickel Doping

To improve the quantum efficiency and stability of perovskite quantum dots, the structural and optical properties are optimized by varying the concentration of Ni doping in CsPbBr₃ perovskite nanocrystals (PNCs). As Ni doping is gradually added, a blue shift is observed at the photoluminescence (PL) spectra. Ni-doped PNCs exhibit stronger light emission, higher quantum efficiency, and longer lifetimes than undoped PNCs. The doped divalent element acts as a defect in the perovskite structure, reducing the recombination rate of electrons and holes. A stability test is used to assess the susceptibility of the perovskite to light and moisture. For ultra-violet light irradiation, the PL intensity of undoped PNCs decreases by 70%, whereas that of Ni-doped PNCs decreases by 18%. In the water addition experiment, the PL intensity of Ni-doped PNCs is three times that of undoped PNCs. For CsPbBr₃ and Ni:CsPbBr₃ PNCs, a light emitting diode is fabricated by spin-coating. The efficiency of Ni:CsPbBr₃ exceeds that of CsPbBr₃ PNCs, and the results significantly differ based on the ratio. A maximum luminance of 833 cd m^–2 is obtained at optimum efficiency (0.3 cd A^–1). Therefore, Ni-doped PNCs are expected to contribute to future performance improvements in display devices.     

Highly Reliable Charge Trap-Type Organic Non-Volatile Memory Device Using Advanced Band-Engineered Organic-Inorganic Hybrid Dielectric Stacks

With the recent interest in data storage in flexible electronics, highly reliable charge trap-type organic-based non-volatile memory (CT-ONVM) has attracted much attention. CT-ONVM should have a wide memory window, good endurance, and long-term retention characteristics, as well as mechanical flexibility. This paper proposed CT-ONVM devices consisting of band-engineered organic–inorganic hybrid films synthesized via an initiated chemical vapor deposition process. The synthesized poly(1,3,5-trimethyl-1,3,5,-trivinyl cyclotrisiloxane) and Al hybrid films are used as a tunneling dielectric layer and a blocking dielectric layer, respectively. For the charge trapping layer, different Hf, Zr, and Ti hybrids are examined, and their memory performances are systematically compared. The best combination of hybrid dielectric stacks showed a wide memory window of 6.77 V, good endurance of up to 10⁴ cycles, and charge retention of up to 71% after 10⁸ s even under the 2% strained condition. The CT-ONVM device using the hybrid dielectric stacks outperforms other organic-based charge trap memory devices and is even comparable in performance to conventional inorganic-based poly-silicon/oxide/nitride/oxide/silicon structures devices. The CT-ONVM using hybrid dielectrics can overcome the inherent low reliability and process complexity limitations of organic electronics and expedite the realization of wearable organic electronics.