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A two dissimiliar unit standby system is analysed. The priority unit can either be in normal or partial operative mode. When the unit fails from the partial mode, it undergoes minor repair and the unit becomes operative with different failure rate. If this unit fails again, it goes to major repair after which it works as good as new. The standby unit while in use is either operative or failed. This non priority unit fails without passing through the partial failure mode and undergoes only one type of repair with different repair time distribution. Failure and repair time distributions are negative exponential and general respectively. Regenerative technique in MRP is applied to obtain several reliability characteristics of interest to system designers.  相似文献   
24.
This paper studies a two-unit parallel system with each unit having two types of failure and two modes of operation—normal or partial failure mode. A unit fails either due to change in operating characteristics or due to catastrophe. The system goes for preventive maintenance randomly (in time). Failure rates are constant while repair and (preventive) maintenance rates are general. Using the theory of regenerative and Markov-renewal processes several important measures of reliability are obtained.  相似文献   
25.
A two-unit series system, in which each unit is equipped with a separate detector to detect failure, is considered. The probability that a detector operates successfully at the time of need (i.e. when system fails) is a function of cost spent on the detector. The problem is that of allocation of total resources (cost) to the two detectors such that the overall expected profit is maximized. The optimization problem has been formulated. Two examples are included to show the uses of results.  相似文献   
26.
This paper obtains various measures of reliability of a two-unit redundant system with three modes. Upon partial failure of an operative unit the cold standby starts operation only when it becomes active. A single service facility is available (1) for repairing a partially or totally failed unit and (2) to activate the cold standby unit whenever required. Failure time distributions are negative exponential while repair and activating time distributions are general.  相似文献   
27.

Authentication schemes are widely used mechanisms to thwart unauthorized access of resources over insecure networks. Several smart card based password authentication schemes have been proposed in the literature. In this paper, we demonstrate the security limitations of a recently proposed password based authentication scheme, and show that their scheme is still vulnerable to forgery and offline password guessing attacks and it is also unable to provide user anonymity, forward secrecy and mutual authentication. With the intention of fixing the weaknesses of that scheme, we present a secure authentication scheme. We show that the proposed scheme is invulnerable to various attacks together with attacks observed in the analyzed scheme through both rigorous formal and informal security analysis. Furthermore, the security analysis using the widely-accepted Real-Or-Random (ROR) model ensures that the proposed scheme provides the session key (SK) security. Finally, we carry out the performance evaluation of the proposed scheme and other related schemes, and the result favors that the proposed scheme provides better trade-off among security and performance as compared to other existing related schemes.

  相似文献   
28.
A comprehensive modeling framework involving mutually uncorrelated contribution from interface trap generation and hole trapping in pre-existing, process related gate insulator traps is used to study NBTI degradation in SiON and HKMG p-MOSFETs. The model can predict time evolution of degradation during DC and AC stress, time evolution of recovery after stress, impact of stress and recovery bias and temperature, and impact of several AC stress parameters such as pulse frequency, duty cycle, duration of last pulse cycle (half or full) and pulse low bias. The model can successfully explain experimental data measured using fast and ultra-fast methods in SiON and HKMG devices having different gate insulator processes. The trap generation and trapping sub components of the composite model have been verified by independent experiments. Data published by different groups are reconciled and explained. The model can successfully predict long time DC and AC stress data and has been used to determine device degradation at end of life as EOT is scaled for different HKMG devices.  相似文献   
29.
This article presents a new current mode single-input-multiple-output nth order universal filter. The proposed circuit employs (n + 1) number multiple output second generation current conveyors and n number grounded capacitors only. Presented circuits can realize current mode low pass, high pass, band pass, notch and all pass responses simultaneously at different high output impedance terminals. The current mode filter circuit provides low input impedance by selecting the proper value of bias current and also has high output impedance, which is suitable for cascading. The circuit offers some important features such as resistor less realization, no passive component matching constraints, low sensitivity, electronic tunability and active-C realization. The functionality of the proposed filter circuit is tested with the PSPICE simulation, which is found to agree well with the proposed theory.  相似文献   
30.
This paper reports the analysis of key parameters affecting voltage transfer characteristics of pseudo PMOS organic inverters. Pentacene has been used as active material for PMOS Organic Thin Film transistor (OTFT). We have used two different inverter configurations for thorough analysis. Each configuration comprises of an enhancement mode driver (VThreshold = −9.7 V) and a depletion mode load (VThreshold = 11.7 V). First configuration has its source and gate terminals shorted. While, second configuration differs with its drain and gate terminals shorted. In order to surmise the theoretical performance of the inverters, we have used load matching technique. After investigating various parameters such as inverting gain, noise margin values (immunity to noise error signals) and threshold voltage value, influencing the voltage inverting efficiency of the two configurations mentioned above, it was found that an inverter with shorted source-gate load configuration is better of the two due to privileges such as saturation mode operation of load, low driver current with early saturation of enhancement mode driver, which facilitates full swing output voltage operation. Second configuration with shorted drain-gate load, lacks saturation mode operation of load and fails to deliver high voltage swing along with acceptable noise margin values and inverting gain.  相似文献   
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