Fine‐Grained FSMD Power Gating Considering Power Overhead

As a fine‐grained power gating method for achieving greater power savings, our approach takes advantage of the finite state machine with a datapath (FSMD) characteristic which shows sequential idleness among subcircuits. In an FSMD‐based power gating, while only an active subcircuit is expected to be turned on, more subcircuits should be activated due to the power overhead. To reduce the number of missed opportunities for power savings, we deactivated some of the turned‐on subcircuits by slowing the FSMD down and predicting its behavior. Our microprocessor experiments showed that the power savings are close to the upper bound.     

CMOS digital duty cycle correction circuit for multi-phase clock

A digital duty cycle correction circuit with a fixed-delay rising-edge output is proposed for use in applications with the multi-phase clock and the standby mode. Two integrators are used in the duty cycle detector to eliminate the effect of reference voltage variations. The output duty cycle is adjusted to 50/spl plusmn/0.25% throughout the input duty cycle range from 20% to 80% at the frequency of 1.25 GHz. 0.18 /spl mu/m CMOS technology is used in this work.     

A low-noise L-band EDFA with a 1500-nm Raman-pumped dispersion-compensating fiber section

This report presents a low-noise L-band erbium-doped fiber amplifier (EDFA) with a dispersion-compensating Raman amplifier. With an optimized prestage and 1500-nm Raman-pump laser diodes, the proposed EDFA achieved an internal noise figure of less than 4.5 dB over a 33-nm flat gain bandwidth within 0.5 dB at -2 dBm of large signal input power.     

Efficient dc-free RLL codes for optical recording

We report on new dc-free runlength-limited codes (DCRLL) intended for the next generation of DVD. The efficiency of the newly developed DCRLL schemes is extremely close to the theoretical maximum, and as a result, significant density gains can be obtained with respect to prior art coding schemes. With a newly developed DCRLL (d=2) code we can achieve a 9% higher overall rate than that of DVD's EFMPlus.     

Hydrogenated amorphous silicon thin film transistor fabricated onplasma treated silicon nitride

We have demonstrated that the performance of the inverted staggered, hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) is improved by a He, H₂, NH₃ or N₂ plasma treatment for a short time on the surface of silicon nitride (SiN _x) before a-Si:H deposition. With increasing plasma exposure time, the field-effect mobility increase at first and then decrease, but the threshold voltage changes little. The a-Si:H TFT with a 6-min N₂ plasma treatment on SiN_x exhibited a field effect mobility of 1.37 cm²/Vs, a threshold voltage of 4.2 V and a subthreshold slope of 0.34 V/dec. It is found that surface roughness of SiN_x is decreased and N concentration in the SiN _x at the surface region decreases using the plasma treatment     

A sensitivity optimization approach to design of a disturbanceobserver in digital motion control systems

This paper is concerned with a digital design methodology for the disturbance observer. The controller (disturbance observer) is designed such that the system sensitivity function is made to match a chosen target sensitivity function by numerical optimization. One advantage of the proposed design method is that the tradeoff between command following, disturbance suppression, and measurement noise rejection is made transparent in the process of the control system design. This allows the system designer to bypass the effort of obtaining a highly accurate system model. Another aim of this research, relative to previous works, is to study how the design specifications can be best structured in the digital filter (a main component of the disturbance observer) for easy implementation. The robust feedback controller, designed in the velocity loop, is used in conjunction with a feedback controller located in the position loop and a feedforward controller acting on the desired output to construct a control structure for high-speed/high-accuracy motion control. Simulation and experiments applied to a high-speed XY table designed for micro positioning demonstrate the effectiveness of the proposed controller     

Reliable Wavelength-Division-Multiplexed Passive Optical Network Using Novel Protection Scheme

A novel, reliable wavelength-division-multiplexed passive optical network (WDM-PON) with self-protection capability is proposed. By utilizing the routing characteristics of N x N arrayed waveguide grating, the proposed architecture can provide automatic protection against any fiber cut between central office and optical network unit (ONU). Compared with the conventional schemes, this scheme adopts colorless ONUs, thus leading to a decrease in the costs of operation, administration, and maintenance, as well as the production cost. Without the performance degradation, the proposed WDM-PON scheme can offer a reliable network service. In the experiment, the protection performance was demonstrated in the carrier-distributed 1.25-Gb/s WDM transmission over 20-km single-mode fiber.     

Automatic Transformation of Membrane‐Type Electronic Devices into Complex 3D Structures via Extrusion Shear Printing and Thermal Relaxation of Acrylonitrile–Butadiene–Styrene Frameworks

This work demonstrates a means of automatic transformation from planar electronic devices to desirable 3D forms. The method uses a spatially designed thermoplastic framework created via extrusion shear printing of acrylonitrile–butadiene–styrene (ABS) on a stress‐free ABS film, which can be laminated to a membrane‐type electronic device layer. Thermal annealing above the glass transition temperature allows stress relaxation in the printed polymer chains, resulting in an overall shape transformation of the framework. In addition, the significant reduction in the Young's modulus and the ability of the polymer chains to reflow in the rubbery state release the stress concentration in the electronic device layer, which can be positioned outside the neutral mechanical plane. Electrical analyses and mechanical simulations of a membrane‐type Au electrode and indium gallium zinc oxide transistor arrays before and after transformation confirm the versatility of this method for developing 3D electronic devices based on planar forms.     

Modeling of silicon oxynitride etch microtrenching using genetic algorithm and neural network

A prediction model of etch microtrenching was constructed by using a neural network. The etching of silicon oxynitride films was conducted in C₂F₆ inductively coupled plasma. The process parameters that were varied in a statistical experimental design include radio frequency source power, bias power, pressure, and C₂F₆ flow rate. The etch microtrenching was quantified from scanning electron microscope images. The prediction accuracy of optimized neural network model with genetic algorithm had a root mean-squared error of 0.03 nm/min. Compared to conventional model, this demonstrates an improvement of about 32%. The constructed model was used to infer etch mechanisms particularly as a function of pressure. Roles of profile sidewall variations were investigated by relating them to the microtrenchings. The pressure effect was conspicuous at lower source power, lower bias power, or higher C₂F₆ flow rate. Microtrenching variations could be reasonably explained by the expected ion reflection from the profile sidewall. The pressure effect seemed to be strongly affected by the relative dominance of fluorine-driven etching over polymer deposition initially maintained in the chamber.     

An optimal checkpointing-strategy for real-time control systemsunder transient faults

Real-time computer systems are often used in harsh environments, such as aerospace, and in industry. Such systems are subject to many transient faults while in operation. Checkpointing enables a reduction in the recovery time from a transient fault by saving intermediate states of a task in a reliable storage facility, and then, on detection of a fault, restoring from a previously stored state. The interval between checkpoints affects the execution time of the task. Whereas inserting more checkpoints and reducing the interval between them reduces the reprocessing time after faults, checkpoints have associated execution costs, and inserting extra checkpoints increases the overall task execution time. Thus, a trade-off between the reprocessing time and the checkpointing overhead leads to an optimal checkpoint placement strategy that optimizes certain performance measures. Real-time control systems are characterized by a timely, and correct, execution of iterative tasks within deadlines. The reliability is the probability that a system functions according to its specification over a period of time. This paper reports on the reliability of a checkpointed real-time control system, where any errors are detected at the checkpointing time. The reliability is used as a performance measure to find the optimal checkpointing strategy. For a single-task control system, the reliability equation over a mission time is derived using the Markov model. Detecting errors at the checkpointing time makes reliability jitter with the number of checkpoints. This forces the need to apply other search algorithms to find the optimal number of checkpoints. By considering the properties of the reliability jittering, a simple algorithm is provided to find the optimal checkpoints effectively. Finally, the reliability model is extended to include multiple tasks by a task allocation algorithm