CMOS dual-band variable-gain amplifier for 3G-WCDMA and WLAN dual-mode RF receivers

A dual-band variable-gain amplifier (DBVGA) is presented for integrated 2.2 GHz 3G-WCDMA and 5.2 GHz WLAN transceivers. DBVGA employs a DC-and-RF current steering technique for gain control, which can minimise variations of the noise, 1 dB gain compression point, and input/output impedance when the gain is tuned. The appropriate frequency operation band of DBVGA is jointly controlled by the switched-resonator load and the input stage gate bias, resulting in high cross-band isolation and out-of-band interference rejection. All circuits except the input stages are reused for both bands to have high component reuse. A fully-integrated 0.18 mum CMOS DBVGA has been implemented to verify the proposed design     

A New Secure Authenticated Group Key Transfer Protocol

Group key transfer protocols depend on a mutually trusted key generation center (KGC) to generate group keys and transport group keys to all group members secretly. Generally, KGC encrypts group keys under another secret key shared with each user during registration. In this paper, we propose a novel secure authenticated group key transfer protocol using a linear secret sharing scheme (LSSS) and ElGamal cryptosystem, where KGC broadcasts group key information to all group members. The confidentiality of this transformation is guaranteed by this LSSS and ElGamal cryptosystem. We also provide authentication for transporting this group key. Goals and security threats of our protocol are analyzed in detail.     

Model for Increasing the Power Obtained from a Thermoelectric Generator Module

We have developed a model for finding the most efficient way of increasing the power obtained from a thermoelectric generator (TEG) module with a variety of operating conditions and limitations. The model is based on both thermoelectric principles and thermal resistance circuits, because a TEG converts heat into electricity consistent with these two theories. It is essential to take into account thermal contact resistance when estimating power generation. Thermal contact resistance causes overestimation of the measured temperature difference between the hot and cold sides of a TEG in calculation of the theoretical power generated, i.e. the theoretical power is larger than the experimental power. The ratio of the experimental open-loop voltage to the measured temperature difference, the effective Seebeck coefficient, can be used to estimate the thermal contact resistance in the model. The ratio of the effective Seebeck coefficient to the theoretical Seebeck coefficient, the Seebeck coefficient ratio, represents the contact conditions. From this ratio, a relationship between performance and different variables can be developed. The measured power generated by a TEG module (TMH400302055; Wise Life Technology, Taiwan) is consistent with the result obtained by use of the model; the relative deviation is 10%. Use of this model to evaluate the most efficient means of increasing the generated power reveals that the TEG module generates 0.14 W when the temperature difference is 25°C and the Seebeck coefficient ratio is 0.4. Several methods can be used triple the amount of power generated. For example, increasing the temperature difference to 43°C generates 0.41 W power; improving the Seebeck coefficient ratio to 0.65 increases the power to 0.39 W; simultaneously increasing the temperature difference to 34°C and improving the Seebeck coefficient ratio to 0.5 increases the power to 0.41 W. Choice of the appropriate method depends on the limitations of system, the cost, and the environment.     

Failure modes and effects analysis for high-power GaN-based light-emitting diodes package technology

In this study, nondestructive test is developed to analyze the structure failure of LED package. The relationship between thermal resistance analysis and LED package failure structure is build with T3Ster thermal transient tester and scanning electron microscope (SEM). The failure LED device with defect in the attaching layer and gap between LED chip and copper are designed advisedly. The failure factors of LED package have been measured with thermal resistance analysis and SEM cross-section images. The thermal dissipation performance of LED with defect in the attaching layer is indicated by thermal resistance analysis combined with SEM cross-section images. The blister in attaching layer results in 4.4 K/W additional thermal resistance. The gap between LED chip and copper also makes high additional thermal resistance with 8.6 K/W. Different failures of LED packages are indicated obviously using thermal transfer analysis. The LED package failure structure such as interface defect between solder and cup-shaped copper is able to forecast without destructive measurement.     

The Economical PAPR Minization Scheme for Combinative Coding Technique Applied OFDM Communication System

In this paper, we propose a new combinative scheme to combine with parity check and block coding methods for the reduction of the peak to average power ratio (PAPR) of orthogonal frequency division multiplexing (OFDM) system. In the proposed schemes, the simulation results shown that Peak-to-Average Power Ratio (PAPR) can be reduced by 3.502 dB. The results of this mapped can be shown that PAPR is reduced. The principle of the scheme is illustrated with the specific example of an eight-carriers signal and its computer simulation results. All simulation results have compare with ideal channel case and AWGN case separately; both of cases are shown the PAPR reduced indeed. Do Horng Guo received his B.S. Degree in Electronic Engineering from National Taiwan Marine Science University, Keelung, Taiwan, in 1983, and M.S. Degree in Computer Communication from Northrop University, Los Angeles, USA, in 1986. He is enrolled in Ph.D program in Graduate Institute of Communication Engineering of Tatung University from 2001. His current interest includes wireless communication system and digital signal processing. Chau-Yun Hsu received his B.S. degree M.S. and Ph.D in Electrical Engineering from Tatung Institute of Technology, Taipei, Taiwan, in 1981, 1983 and 1988, respectively. He was the lecturer in Department of Electrical Engineering of Tatung University from 1983 to 1985. From 1988 to 1997, he served as the Associate professor of Tatung University. Since 1998, he has been the Chair Professor of Graduate Institute of Communication Engineering of Tatung University. Now he is also the chair of department of Electrical Engineering of Tatung University. His current interest includes Wireless Channel Model and Estimation, Machine Learning, Digital Signal Processing and Image Processing.     

ZnO TFT Devices Built on Glass Substrates

ZnO thin-film transistors (TFTs) were built on glass substrates. The device with a top gate configuration operates in the depletion mode. The ZnO channel was grown by metalorganic chemical vapor deposition (MOCVD) on glass at low temperature. SiO₂ was used as the gate dielectric. The TFT has an on/off ratio of ∼4.0 × 10⁴ and a channel field-effect mobility of ∼4.0 cm²/V s. The average transmittance of the ZnO film in the visible wavelength is ∼80%. To compare the characteristics of the TFTs prepared by using a poly-ZnO and epitaxial-ZnO channel, an epi-ZnO TFT with the same configuration and dimensions was made on an r-Al₂O₃ substrate. The epi-ZnO TFT shows higher field-effect mobility of ∼35 cm²/V s and on/off ratio of ∼10⁸.     

A high precision global prediction approach based on local prediction approaches

Traditional model-free prediction approaches, such as neural networks or fuzzy models use all training data without preference in building their prediction models. Alternately, one may make predictions based only on a set of the most recent data without using other data. Usually, such local prediction schemes may have better performance in predicting time series than global prediction schemes do. However, local prediction schemes only use the most recent information and ignore information bearing on far away data. As a result, the accuracy of local prediction schemes may be limited. In this paper a novel prediction approach, termed the Markov-Fourier gray model (MFGM), is proposed. The approach builds a gray model from a set of the most recent data and a Fourier series is used to fit the residuals produced by this gray model. Then, the Markov matrices are employed to encode possible global information generated also by the residuals. It is evident that MFGM can provide the best performance among existing prediction schemes. Besides, we also implemented a short-term MFGM approach, in which the Markov matrices only recorded information for a period of time instead of all data. The predictions using MFGM again are more accurate than those using short-term MFGM. Thus, it is concluded that the global information encoded in the Markov matrices indeed can provide useful information for predictions.     

A multiple relay‐based medium access control protocol in multirate wireless ad hoc networks with multiple beam antennas

The advanced technique of multiple beam antennas is recently considered in wireless networks to improve the system throughput by increasing spatial reuse, reducing collisions, and avoiding co‐channel interference. The usage of multiple beam antennas is similar to the concept of Space Division Multiple Access (SDMA), while each beam can be treated as a data channel. Wireless networks can increase the total throughput and decrease the transmission latency if the physical layer of a mobile node can support multirate capability. Multirate wireless networks incurs the anomaly problem, because low data rate hosts may influence the original performance of high data rate hosts. In this work, each node fits out multiple beam antennas with multirate capability, and a node can either simultaneously transmit or receive multiple data on multiple beams. Observe that the transmitting or receiving operation does not happen at the same time. In this paper, we propose a multiple relay‐based medium access control (MAC) protocol to improve the throughput for low data rate hosts. Our MAC protocol exploits multiple relay nodes and helps the source and the destination to create more than one data channel to significantly reduce the transmission latency. Observe that low data rate links with long‐distance transmission latencies are distributed by multiple relay nodes, hence the anomaly problem can be significantly alleviated. In addition, the ACK synchronization problem is solved to avoid the condition that source nodes do not receive ACKs from destination nodes. An adjustment operation is presented to reduce unnecessary relay nodes during the fragment burst period. Finally, simulation results illustrate that our multiple relay‐based MAC protocol can achieve high throughput and low transmission latency. Copyright © 2009 John Wiley & Sons, Ltd.     

Substrate-triggered SCR device for on-chip ESD protection in fully silicided sub-0.25-/spl mu/m CMOS process

The turn-on mechanism of a silicon-controlled rectifier (SCR) device is essentially a current triggering event. While a current is applied to the base or substrate of the SCR device, it can be quickly triggered into its latching state. In this paper, a novel design concept to turn on the SCR device by applying the substrate-triggered technique is first proposed for effective on-chip electrostatic discharge (ESD) protection. This novel substrate-triggered SCR device has the advantages of controllable switching voltage and adjustable holding voltage and is compatible with general CMOS processes without extra process modification such as the silicide-blocking mask and ESD implantation. Moreover, the substrate-triggered SCR devices can be stacked in ESD protection circuits to avoid the transient-induced latch-up issue. The turn-on time of the proposed substrate-triggered SCR devices can be reduced from 27.4 to 7.8 ns by the substrate-triggering technique. The substrate-triggered SCR device with a small active area of only 20 /spl mu/m /spl times/ 20 /spl mu/m can sustain the HBM ESD stress of 6.5 kV in a fully silicided 0.25-/spl mu/m CMOS process.