Phase-Noise Improvement of GaAs pHEMT K-Band Voltage-Controlled Oscillator Using Tunable Field-Plate Voltage Technology

This letter presents a voltage-controlled oscillator (VCO) with low phase-noise performance by applying tunable field-plate (FP) voltage on 0.15-mum-gate-length GaAs pseudomorphic high-electron-mobility transistors (pHEMTs). In this letter, the FP metal between gate and drain terminals was connected to a single pad and was controlled by an extra voltage supplier (V_FP). Owing to the depth modulation of FP-induced depletion region at various FP voltages, the device flicker noise was also improved by applying negative V_FP. This technique is convenient to be applied in standard pHEMT fabrication and particularly attractive for reducing the phase noise of VCO design without extra power consumption. A tunable phase-noise inductor-capacitor feedback 21-GHz VCO was demonstrated. The measured phase noise of this novel design is -95 dBc/Hz at an offset frequency of 1 MHz, and this value can be improved to -99.6 dBc/Hz at V_FP of -5.5 V. The core dc-power consumption of this circuit is 30.8 mW.     

Electromigration Reliability and Morphologies of Cu Pillar Flip-Chip Solder Joints with Cu Substrate Pad Metallization

The Cu pillar is a thick underbump metallurgy (UBM) structure developed to alleviate current crowding in a flip-chip solder joint under operating conditions. We present in this work an examination of the electromigration reliability and morphologies of Cu pillar flip-chip solder joints formed by joining Ti/Cu/Ni UBM with largely elongated ∼62 μm Cu onto Cu substrate pad metallization using the Sn-3Ag-0.5Cu solder alloy. Three test conditions that controlled average current densities in solder joints and ambient temperatures were considered: 10 kA/cm² at 150°C, 10 kA/cm² at 160°C, and 15 kA/cm² at 125°C. Electromigration reliability of this particular solder joint turns out to be greatly enhanced compared to a conventional solder joint with a thin-film-stack UBM. Cross-sectional examinations of solder joints upon failure indicate that cracks formed in (Cu,Ni)₆Sn₅ or Cu₆Sn₅ intermetallic compounds (IMCs) near the cathode side of the solder joint. Moreover, the ~52-μm-thick Sn-Ag-Cu solder after long-term current stressing has turned into a combination of ~80% Cu-Ni-Sn IMC and ~20% Sn-rich phases, which appeared in the form of large aggregates that in general were distributed on the cathode side of the solder joint.     

Nano-Processing Techniques Applied in GaN-Based Light-Emitting Devices With Self-Assembly Ni Nano-Masks

We have developed a simple method to fabricate nanoscale masks by using self-assembly Ni clusters formed through a rapid thermal annealing (RTA) process. The density and dimensions of the Ni nano-masks could be precisely controlled. The nano-masks were successfully applied to GaN-based light-emitting diodes (LEDs) with nano-roughened surface, GaN nanorods, and GaN-based nanorod LEDs to enhance light output power or change structure properties. The GaN-based LED with nano-roughened surface by Ni nano-masks and excimer laser etching has increased 55% light output at 20 mA when compared to that without the nano-roughened process. The GaN nanorods fabricated by the Ni nano-masks and ICP-RIE dry etching showed 3.5 times over the as-grown sample in photoluminescence (PL) intensity. The GaN-based nanorod LEDs assisted by photo-enhanced chemical (PEC) wet oxidation process were also demonstrated. The electroluminescence (EL) intensity of the GaN-based nanorod LED with PEC was about 1.76 times that of the as-grown LED. The fabrication, structure properties, physical features, and the optical and electrical properties of the fabricated devices will be discussed.     

Roughness characterization of silver oxide anodes for use in efficient top-illuminated organic solar cells

In this study, we optimize the process of treating the surface of Ag anodes through exposure to UV-ozone, for the efficient planar heterojuction top-illuminated organic solar cells (OSCs). Several characteristics of Ag anodes such as work function (Ф_Anode), surface roughness (R_a) and sheet resistance are increased proportionally to exposure time following the formation of AgO_x on the surface. Two factors, Ф_Anode and R_a, dominated the performance of the device due to their opposite contributions of power conversion efficiency (PCE). An increase in Ф_Anode flattened the energy barrier level between the anode and copper phthalocyanine, thereby benefiting hole injection and increasing open circuit voltage (V_OC). An increase in R_a led to an increase in the density of localized traps, which obstructed hole injection and degraded the V_OC. It also reduced reflectivity, thereby diminishing the short circuit current density (J_SC). The top-illuminated OSCs in this study were optimized following surface treatment of the anode for 45 s to achieve a maximum PCE of 1.04%, V_OC of 0.48 V, and J_SC of 3.56 mA/cm² with a fill factor of 60.7%.     

Controllable p-n junction formation in monolayer graphene using electrostatic substrate engineering

We investigate electric transport in graphene on SiO2 in the high field limit and report on the formation of p-n junctions. Previously, doping of graphene has been achieved by using multiple electrostatic gates, or charge transfer from adsorbants. Here we demonstrate a novel approach to create p-n junctions by changing the local electrostatic potential in the vicinity of one of the contacts without the use of extra gates. The approach is based on the electronic modification not of the graphene but of the substrate and produces a well-behaved, sharp junction whose position and height can be controlled.     

Modification of sputter deposited solid-state electrolyte thin films

All solid-state thin film batteries (TFBs) consisting of amorphous lithium phosphorus oxynitride (LiPON) solid electrolyte, crystalline LiMn₂O₄ cathode and crystalline SnO₂ anode have been fabricated and characterized. All of the thin films are prepared by RF magnetron sputtering. By fabricating under different pressures and applying low temperature post-annealing (200 °C), the performances of the LiPON electrolytes and SnO₂/LiPON/LiMn₂O₄ TFBs are improved. Suitable working pressures results in pinhole-free amorphous LiPON films with smooth surface and dense micro-structure. The TFBs post-annealed at 200 °C show smooth interface contacts between electrode and electrolyte thin films. The low pressure deposited and post-annealed TFBs exhibits lower impedance and higher cycling stability. Initial open-circuit voltage of 3.8 V and initial capacity of 12 μAh/cm² are obtained.     

Effects of mesoscopic poly(3,4-ethylenedioxythiophene) films as counter electrodes for dye-sensitized solar cells

Counter electrode coated with chemically polymerized poly(3,4-ethylenedioxythiophene) (PEDOT) in a dye-sensitized solar cell (DSSC) was studied. The surface morphology and the nature of I⁻/I₃⁻ redox reaction based on PEDOT film were investigated using Atomic Force Microscopy and Cyclic Voltammetry, respectively. The performance of the DSSCs containing the PEDOT coated electrode was compared with sputtered-Pt electrode. We found that the root mean square roughness decreases and conductivity increases as the molar ratio of imidazole (Im)/EDOT in the PEDOT film increases. The DSSC containing the PEDOT coated on fluorine doped tin oxide glass with Im/EDOT molar ratio of 2.0, showed a conversion efficiency of 7.44% compared to that with sputtered-Pt electrode (7.77%). The high photocurrents were attributed to the large effective surface area of the electrode material resulting in good catalytic properties for I₃⁻ reduction. Therefore, the incorporation of a multi-walled carbon nanotube (MWCNT) in the PEDOT film, coated on various substrates was also investigated. The DSSC containing the PEDOT films with 0.6 wt.% of MWCNT on stainless steel as counter electrode had the best cell performance of 8.08% with short-circuit current density, open-circuit voltage and fill factor of 17.00 mA cm⁻², 720 mV and 0.66, respectively.     

State Boundary Surfaces for an Aged Compacted Clay

The yielding and the peak strength of an aged compacted clay were studied by conducting a series of suction-controlled triaxial tests. The test results were interpreted using the framework of intrinsic properties of reconstituted soil. The peak strength envelopes of undisturbed samples lie above those of reconstituted samples. The suction provides additional attractive forces to stabilize the soil structure, which result in the augmentation of the yield stress and peak strength envelope. The shear strength is normalized by the equivalent preconsolidation pressure (pe′) and Hvorslev surfaces are identified from undisturbed samples which expand with suction. A single peak strength envelope and Hvorslev surface will be emerged from the saturated and unsaturated (degree of saturation >80%) samples if the shear strength data are presented in terms of the average skeleton stress. The influence of the soil structure on the shear strength of the aged compacted clay may be measured by the ratio of normalized strengths at the intrinsic critical state which is about 1.26     

Design and Analysis of Shock-Absorbing Structure for Flat Panel Display

In order to protect the fragile panel of a liquid crystal display (LCD) from damage caused by shock, a shock-absorbing structure designed to absorb most of the shock energy can be installed between the panel and the frame. The design methodology proposed in this paper uses the topology optimization technique in designing this shock-absorbing structure. The objective is to minimize the maximal panel stress with the shock-absorbing structure, which is designed to be of minimal weight. An algorithm which integrates three modules-the finite-element software ANSYS/LS-DYNA used as the structural analysis tool, the optimization module based on the differential evolution method, and a topology module - is developed to achieve crashworthiness design. Numerical results show that an optimal layout of the shock-absorbing structure with minimal weight is obtained. And, this shock-absorbing structure is proven to effectively increase LCD shock resistance.     

Electrical Characteristics of Passivated Pseudomorphic HEMTs With $hbox{P}_{hbox{2}}hbox{S}_{hbox{5}}/(hbox{NH}_{hbox{4}})_{hbox{2}}hbox{S}_{hbox{X}}$ Pretreatment

This paper elucidates the dc, pulse I-V, microwave, flicker noise, and power properties of AlGaAs/InGaAs pseudomorphic high electron mobility transistors (pHEMTs) after various ex situ sulfur pretreatments. The pHEMTs were pretreated with NH₄OH, (NH₄)₂S_X, and P₂S₅/(NH₄)₂S_X solutions before SiO₂ passivation to reduce the GaAs native oxide-related surface states. Stable phosphorus oxides and sulfur bound to the Ga and As species can be efficiently obtained using P₂S₅/(NH₄)₂S_X pretreatment; therefore, the leakage current in pHEMT was reduced following this process. Atomic force microscopy measurements indicated that the phosphorus oxides formed by P₂S₅/(NH₄)₂S_X treatment also provided a better surface roughness than obtained following traditional (NH₄)2S_X-only pretreatment, reducing mobility degradation after sulfur pretreatment. Based on the dc and 1 mus pulse I-V measurement results, P₂S₅/(NH₄)₂S_X-treated pHEMT exhibited very similar I_ds trends, especially at high currents; however, NH₄OH, (NH₄)₂S_X treatments clearly reduced the current upon pulse measurement because of the presence of surface traps. Hence, this novel pretreatment method has great potential for highly linear microwave power transistor applications.