Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling

State-of-the-art devices in the consumer electronics market are relying more and more on Multi-Processor Systems-On-Chip (MPSoCs) as an efficient solution to meet their multiple design constrains, such as low cost, low power consumption, high performance and short time-to-market. In fact, as technology scales down, logic density and power density increase, generating hot spots that seriously affect the MPSoC performance and can physically damage the final system behavior. Moreover, forthcoming three-dimensional (3D) MPSoCs can achieve higher system integration density, but the aforementioned thermal problems are seriously aggravated. Thus, new thermal exploration tools are needed to study the temperature variation effects inside 3D MPSoCs. In this paper, we present a novel approach for fast transient thermal modeling and analysis of 3D MPSoCs with active (liquid) cooling solutions, while capturing the hardware-software interaction. In order to preserve both accuracy and speed, we propose a close-loop framework that combines the use of Field Programmable Gate Arrays (FPGAs) to emulate the hardware components of 2D/3D MPSoC platforms with a highly optimized thermal simulator, which uses an RC-based linear thermal model to analyze the liquid flow. The proposed framework offers speed-ups of more than three orders of magnitude when compared to cycle-accurate 3D MPSoC thermal simulators. Thus, this approach enables MPSoC designers to validate different hardware- and software-based 3D thermal management policies in real-time, and while running real-life applications, including liquid cooling injection control.     

CMOS-Compatible Room-Temperature Rectifier Toward Terahertz Radiation Detection

In this paper, we present a new rectifying device, compatible with the technology of CMOS image sensors, suitable for implementing a direct-conversion detector operating at room temperature for operation at up to terahertz frequencies. The rectifying device can be obtained by introducing some simple modifications of the charge-storage well in conventional CMOS integrated circuits, making the proposed solution easy to integrate with the existing imaging systems. The rectifying device is combined with the different elements of the detector, composed of a 3D high-performance antenna and a charge-storage well. In particular, its position just below the edge of the 3D antenna takes maximum advantage of the high electric field concentrated by the antenna itself. In addition, the proposed structure ensures the integrity of the charge-storage well of the detector. In the structure, it is not necessary to use very scaled and costly technological nodes, since the CMOS transistor only provides the necessary integrated readout electronics. On-wafer measurements of RF characteristics of the designed junction are reported and discussed. The overall performances of the entire detector in terms of noise equivalent power (NEP) are evaluated by combining low-frequency measurements of the rectifier with numerical simulations of the 3D antenna and the semiconductor structure at 1 THz, allowing prediction of the achievable NEP.     

Use of Neural Networks for Automatic Classification From High-Resolution Images

The effectiveness of multilayer perceptron (MLP) networks as a tool for the classification of remotely sensed images has been already proven in past years. However, most of the studies consider images characterized by high spatial resolution (around 15-30 m) while a detailed analysis of the performance of this type of classifier on very high resolution images (around 1-2 m) such as those provided by the Quickbird satellite is still lacking. Moreover, the classification problem is normally understood as the classification of a single image while the capabilities of a single network of performing automatic classification and feature extraction over a collection of archived images has not been explored so far. In this paper, besides assessing the performance of MLP for the classification of very high resolution images, we investigate on the generalization capabilities of this type of algorithms with the purpose of using them as a tool for fully automatic classification of collections of satellite images, either at very high or at high-resolution. In particular, applications to urban area monitoring have been addressed     

Speed up of Video Enhancement based on Human Perception

This paper presents SUVEHP (speed up of video enhancement based on human perception), a human perception-based model oriented to reduce the computational time of digital video restoration. In particular, two specific hypothesis tests able to classify degraded frame regions are proposed. Classification is performed in agreement with regions visual significance in order to enable or inhibit motion compensated enhancement. The level of the proposed hypothesis tests is theoretically assessed. Moreover, extensive experimental results on video sequences affected by additive Gaussian noise show that SUVEHP speeds up some standard motion compensated denoisers up to 60%, preserving or even slightly increasing both the objective and subjective visual quality of the restored sequences.     

Multichannel transmission of a multicore fiber coupled withvertical-cavity surface-emitting lasers

A two-channel simultaneous transmission is experimented using direct coupling between a vertical-cavity surface-emitting laser (VCSEL) array and a novel 2×2 core optical fiber. No crosstalk is observed. Coupling efficiency and mechanical tolerance are good enough to envisage system applications     

Audio decoding with frequency and complexity scalability

The paper describes a technique to design a complexity-scalable audio codec based on the partial reconstruction of the spectrum of a signal. The technique can be applied to any subband coding system based on cosine-modulated filterbanks. In the decoder, only a part of the subband is reconstructed, achieving an output signal with a lower sampling rate. The new synthesis filterbank, with a reduced number of channels and low computational cost, must be suitably designed. Hence, a computational saving is traded for lower quality in the reconstructed signal. The technique can be used to design low-complexity decoders compatible with the MPEG audio standard, i.e. able to decode only a part of an MPEG bit stream. In this way, a single MPEG-coded audio can be decoded by different receivers, i.e. standard and low-complexity ones. The problem of having fixed bit rate streams for all the decoders is discussed.     

BE-TANOS: Feasibility and technology limitations

The aim of this work is to investigate the physical mechanisms behind the write/erase and retention performances of band gap engineering (BE) layers used as tunnel oxide in charge trap memory stack. The investigation of the BE layers alone will be completed with the analyses of its integration within a TANOS (TaN/Alumina/Nitride/Oxide/Silicon) stack, pointing out the correlation between electrical performance and reliability limits.Good write/erase/retention performances can be achieved with BE tunnel oxide by using silicon nitride layer integrated in SiO₂-Si₃N₄-SiO₂ stack, as long as all different mechanisms are taken into account in optimizing stack composition: hole injection which improves erase efficiency, charge trapping and de-trapping from the thin silicon nitride which causes program instabilities and initial charge loss which does not significantly impact long term retention. All these phenomena make very crucial the BE tunnel process control and difficult its use for multi-level application.