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951.
The supply voltage to threshold voltage ratio is reduced with each new technology generation. The gate overdrive variation with temperature plays an increasingly important role in determining the speed characteristics of CMOS integrated circuits. The temperature-dependent propagation delay characteristics, as shown in this brief, will experience a complete reversal in the near future. Contrary to the older technology generations, the speed of circuits in a 45-nm CMOS technology is enhanced when the temperature is increased at the nominal supply voltage. Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable operation under temperature fluctuations. A design methodology based on optimizing the supply voltage for temperature-variation-insensitive circuit performance is proposed in this brief. The optimum supply voltage is 45% to 53% lower than the nominal supply voltage in a 180-nm CMOS technology. Alternatively, the optimum supply voltage is 15% to 35% higher than the nominal supply voltage in a 45-nm CMOS technology. The speed and energy tradeoffs in the supply voltage optimization technique are also presented  相似文献   
952.
A new scheme is introduced for obtaining higher stability performance for the symplectic finite-difference time-domain (FDTD) method. Both the stability limit and the numerical dispersion of the symplectic FDTD are determined by a function zeta. It is shown that when the zeta function is a Chebyshev polynomial the stability limit is linearly proportional to the number of the exponential operators. Thus, the stability limit can be increased as much as possible at the cost of increased number of operators. For example, the stability limit of the four-exponential operator scheme is 0.989 and of the eight-exponential operator scheme it is 1.979 for fourth-order space discretization in three dimensions, which is almost three times the stability limit of previously published symplectic FDTD schemes with a similar number of operators. This study also shows that the numerical dispersion errors for this new scheme are less than those of the previously reported symplectic FDTD schemes  相似文献   
953.
Security is becoming an everyday concern for a wide range of electronic systems that manipulate, communicate, and store sensitive data. An important and emerging category of such electronic systems are battery-powered mobile appliances, such as personal digital assistants (PDAs) and cell phones, which are severely constrained in the resources they possess, namely, processor, battery, and memory. This work focuses on one important constraint of such devices-battery life-and examines how it is impacted by the use of various security mechanisms. In this paper, we first present a comprehensive analysis of the energy requirements of a wide range of cryptographic algorithms that form the building blocks of security mechanisms such as security protocols. We then study the energy consumption requirements of the most popular transport-layer security protocol: Secure Sockets Layer (SSL). We investigate the impact of various parameters at the protocol level (such as cipher suites, authentication mechanisms, and transaction sizes, etc.) and the cryptographic algorithm level (cipher modes, strength) on the overall energy consumption for secure data transactions. To our knowledge, this is the first comprehensive analysis of the energy requirements of SSL. For our studies, we have developed a measurement-based experimental testbed that consists of an iPAQ PDA connected to a wireless local area network (LAN) and running Linux, a PC-based data acquisition system for real-time current measurement, the OpenSSL implementation of the SSL protocol, and parameterizable SSL client and server test programs. Based on our results, we also discuss various opportunities for realizing energy-efficient implementations of security protocols. We believe such investigations to be an important first step toward addressing the challenges of energy-efficient security for battery-constrained systems.  相似文献   
954.
This letter focuses on the performance analysis of the decorrelating receiver in multipath Rician faded CDMA channels. M-ary QAM scheme is employed to improve the spectral efficiency. Approximate expressions are first derived for the two performance indexes: the average symbol error rate (SER) and the average bit error rate (BER) when the decorrelating-first receiver perfectly knows the channel information of the user of interest. To achieve desirable closed-form expressions of the SER and the BER, we exploit results in large system analysis and make assumptions of a high signal-to-interference ratio (SIR) and/or a small Rician K-factor. To measure the receiver performance in the practical scenario, we further derive expressions to approximate the average SER and BER of the decorrelating-first scheme with channel uncertainty. Simulation results demonstrate that the analytical results can also be employed to evaluate the performance of the combining-first receiver.  相似文献   
955.
Solar cells based on SnO2/Cd0.4Zn0.6S/CdTe heterostructures are fabricated by electrochemical deposition, and the dependences of their electrical and photoelectric properties on the thermal annealing conditions are studied. It is shown that thermal annealing reduces the tunnel currents by almost two orders of magnitude. The best conditions of thermal annealing are determined (t = 300°C and τ = 9 min). These conditions provide the highest photosensitivity of the heterostructures under study (I sc ≈ 21.2 mA/cm2, U oc ≈ 813 mV, and η = 14.7%).  相似文献   
956.
Direct and inverse problems are considered for diffraction by an open end of a rectangular waveguide (RW) with a flange that adjoins a piecewise inhomogeneous planar layered lossy medium. Also considered are similar diffraction problems for a junction of an RW and a rectangular resonator filled with a multilayer medium and a junction of two RWs, one of which contains a multilayer plate. Such open and shielded waveguide probe structures (WPSs) are used for determination and nondestructive testing of parameters of multilayer samples. The direct problem is formulated on the basis of admittance and impedance algorithms with consideration for losses existing in the medium, flange, and screens. In this case, the approximation of the given aperture field allows obtainment of explicit solutions for open and shielded WPSs in the form of integrals. Solution of the inverse problem that lies in determining thicknesses, permittivities, and permeabilities of the layers from measured values of the magnitude of the reflection coefficient is obtained by minimizing the corresponding least-squares error and by constructing artificial neural networks. In order to increase the accuracy, it is proposed to use a two-port of errors and perform measurements for several positions of the sample with respect to the flange and different impedance conditions behind the sample.  相似文献   
957.
Photoemission of polarized electrons from heterostructures based on InAlGaAs/GaAs superlattices with minimum conduction-band offsets is investigated. The comparison of the excitation energy dependence of the photoemission polarization degree with the calculated spectra make it possible to determine the polarization losses at different stages of the photoemission. A maximum polarization of P = 91% and a quantum yield of 0.14% are close to the best results obtained for photocathodes on the basis of strained semiconductor superlattices.  相似文献   
958.
Towards intelligent dressing   总被引:1,自引:0,他引:1  
The aim of this article is to state the principles of an intelligent monitoring and control system for the grinding machine, comprising the dressing process as well as grinding stability.  相似文献   
959.
Globally asynchronous, locally synchronous (GALS) systems-on-chip (SoCs) may be prone to synchronization failures if the delay of their locally-generated clock tree is not considered. This paper presents an in-depth analysis of the problem and proposes a novel solution. The problem is analyzed considering the magnitude of clock tree delays, the cycle times of the GALS module, and the complexity of the asynchronous interface controllers using a timed signal transition graph (STG) approach. In some cases, the problem can be solved by extracting all the delays and verifying whether the system is susceptible to metastability. In other cases, when high data bandwidth is not required, matched-delay asynchronous ports may be employed. A novel architecture for synchronizing inter-modular communications in GALS, based on locally delayed latching (LDL), is described. LDL synchronization does not require pausable clocking, is insensitive to clock tree delays, and supports high data rates. It replaces complex global timing constraints with simpler localized ones. Three different LDL ports are presented. The risk of metastability in the synchronizer is analyzed in a technology-independent manner  相似文献   
960.
The variation of current density with bias or temperature is examined for DNA molecules of different configuration. To this end, the DNA molecule is represented as an equivalent electrical network whose behavior is then simulated with PSPICE. The results are found to be in close agreement with ones obtained within a physical model. It is established that the electrical response of a DNA molecule to an applied electric field depends on the boundary conditions and the potential profile along the molecule. This finding should contribute to the creation of a complete library of DNA-molecule configurations with prescribed electrical properties.  相似文献   
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