Characterizing multi‐hop localization for Internet of things

Deployments over large geographical areas in the Internet of Things (IoT) pose a major challenge for single‐hop localization techniques, giving rise to applications of multi‐hop localizations. And while many proposals have been made on implementations for multi‐hop localization, a close understanding of its characteristics is yet to be established. Such an understanding is necessary, and is inevitable in extending the reliability of location based services in IoT. In this paper, we study the characteristics of multi‐hop localization and propose a new solution to enhance the performance of multi‐hop localization techniques. We first examine popular assumptions made in simulating multi‐hop localization techniques, and offer rectifications facilitating more realistic simulation models. We identify the introduced errors to follow the Gaussian distribution, and the estimated distance follows the Rayleigh distribution. We next use our simulation model to characterize the effect of the number of hops on localization in both dense and sparse deployments. We find that, contrary to common belief, it is better to use long hops in sparse deployments, while short hops are better in dense deployments – despite the traffic overhead. Finally, we propose a new solution that decreases and manages the overhead generated during the localization process. Copyright © 2016 John Wiley & Sons, Ltd.     

Highly linear micropower class AB current mirrors using Quasi-Floating Gate transistors

A design approach to achieve low-voltage micropower class AB CMOS cascode current mirrors is presented. Both class AB operation and dynamic cascode biasing are based on the use of Quasi-Floating Gate transistors. They allow high linearity for large signal currents and accurately set quiescent currents without requiring extra power consumption or supply voltage requirements. Measurement results show that dynamic cascode biasing allows a wider input range and a linearity improvement of more than 23 dB with respect to the use of conventional biasing. A THD value better than −35 dB is measured for input amplitudes up to 100 times the bias currents. Two class AB current mirror topologies are proposed, with slightly different ways to achieve class AB operation and dynamic biasing. The proposed current mirrors, fabricated in a 0.5 µm CMOS technology, are able to operate with a supply voltage of 1.2 V and a quiescent power consumption of only 36 µW, using a silicon area <0.025 mm².     

Hybrid wavelet measurement matrices for improving compressive imaging

Compressive sensing principle claims that a compressible signal can be recovered from a small number of random linear measurements. However, the design of efficient measurement basis in compressive imaging remains as a challenging problem. In this paper, a new set of hybrid wavelet measurement matrices is proposed to improve the quality of the compressive imaging, increase the compression ratio and reduce the processing time. The performance of these hybrid wavelet matrices for image modeling and reconstruction is evaluated and compared with other traditional measurement matrices such as the random measurement matrices, Walsh and DCT matrices. The compressive imaging approach chosen in this study is the block compressive sensing with smoothed projected Landweber reconstruction technique. The simulation results indicate that the imaging performance of the proposed hybrid wavelet measurement matrices is approximately 2–3 dB better than that obtained using Gaussian matrix especially at higher compression ratios.     

Quantum‐Tunneling Metal‐Insulator‐Metal Diodes Made by Rapid Atmospheric Pressure Chemical Vapor Deposition

A quantum‐tunneling metal‐insulator‐metal (MIM) diode is fabricated by atmospheric pressure chemical vapor deposition (AP‐CVD) for the first time. This scalable method is used to produce MIM diodes with high‐quality, pinhole‐free Al₂O₃ films more rapidly than by conventional vacuum‐based approaches. This work demonstrates that clean room fabrication is not a prerequisite for quantum‐enabled devices. In fact, the MIM diodes fabricated by AP‐CVD show a lower effective barrier height (2.20 eV) at the electrode–insulator interface than those fabricated by conventional plasma‐enhanced atomic layer deposition (2.80 eV), resulting in a lower turn on voltage of 1.4 V, lower zero‐bias resistance, and better asymmetry of 107.     

Effect of wafer thinning methods towards fracture strength and topography of silicon die

This paper characterizes die damage resulting from various wafer thinning processes. Die fracture strength is measured using ball breaker test with respect to die surface finish. Further study on surface roughness and topography of each surface finish is obtained by atomic force microscopy (AFM) and scanning electron microscopy (SEM) techniques. Stress relief process with 25 μm removal is able to strengthen 100 μm wafer by 20.4% using chemical wet etch and 75 μm wafer by 36.4% with plasma etch. Relatively, plasma etching shows higher fracture strength and flexibility compared to chemical wet etch. This is due to topography of the finished surface of plasma etch is smoother and rounded, leading to a reduced stress concentration, hence improved fracture strength.     

Directly Deposited Antimony on a Copper Silicide Nanowire Array as a High-Performance Potassium-Ion Battery Anode with a Long Cycle Life

Antimony (Sb) is a promising anode material for potassium-ion batteries (PIBs) due to its high capacity and moderate working potential. Achieving stable electrochemical performance for Sb is hindered by the enormous volume variation that occurs during cycling, causing a significant loss of the active material and disconnection from conventional current collectors (CCs). Herein, the direct growth of a highly dense copper silicide (Cu₁₅Si₄) nanowire (NW) array from a Cu mesh substrate to form a 3D CC is reported that facilitates the direct deposition of Sb in a core-shell arrangement (Sb@Cu₁₅Si₄ NWs). The 3D Cu₁₅Si₄ NW array provides a strong anchoring effect for Sb, while the spaces between the NWs act as a buffer zone for Sb expansion/contraction during K–cycling. The binder-free Sb@Cu₁₅Si₄ anode displays a stable capacity of 250.2 mAh g⁻¹ at 200 mA g⁻¹ for over 1250 cycles with a capacity drop of ≈0.028% per cycle. Ex situ electron microscopy revealed that the stable performance is due to the complete restructuring of the Sb shell into a porous interconnected network of mechanically robust ligaments. Notably, the 3D Cu₁₅Si₄ NW CC is expected to be widely applicable for the development of alloying-type anodes for next-generation energy storage devices.     

Synthesis and Microwave Dielectric Properties of SrLa4−x Pr x Ti5O17 (0 ≤ x ≤ 4) Ceramics

Single-phase ceramics in the SrLa_4?x Pr _x La₄Ti₅O₁₇ (0 ≤ x ≤ 4) series were processed via a solid-state sintering route. X-ray diffraction analysis revealed single-phase ceramics for all the compositions. The molar volume (V _m) decreased while the theoretical density (ρ _th) increased with increase in the Pr content. Substitution of Pr³⁺ decreased the relative permittivity (ε _r) and temperature coefficient of resonant frequency (τ _f) due to its smaller ionic polarizability (α _d) and ionic radius than La³⁺. In the present study, ε _r ≈ 54.2, Q _u f ₀  ≈ 7935 GHz, and τ _f  ≈ ?20.3 ppm/°C were achieved for the composition with x = 2 (i.e., SrLa₂Pr₂Ti₅O₁₇).     

Inkjet Printing of Self‐Assembled 2D Titanium Carbide and Protein Electrodes for Stimuli‐Responsive Electromagnetic Shielding

2D titanium carbides (MXene) possess significant characteristics including high conductivity and electromagnetic interference shielding efficiency (EMI SE) that are important for applications in printed and flexible electronics. However, MXene‐based ink formulations are yet to be demonstrated for proper inkjet printing of MXene patterns. Here, tandem repeat synthetic proteins based on squid ring teeth (SRT) are employed as templates of molecular self‐assembly to engineer MXene inks that can be printed as stimuli‐responsive electrodes on various substrates including cellulose paper, glass, and flexible polyethylene terephthalate (PET). MXene electrodes printed on PET substrates are able to display electrical conductivity values as high as 1080 ± 175 S cm^?1, which significantly exceeds electrical conductivity values of state‐of‐the‐art inkjet‐printed electrodes composed of other 2D materials including graphene (250 S cm^?1) and reduced graphene oxide (340 S cm^?1). Furthermore, this high electrical conductivity is sustained under excessive bending deformation. These flexible electrodes also exhibit effective EMI SE values reaching 50 dB at films with thicknesses of 1.35 µm, which mainly originate from their high electrical conductivity and layered structure.     

Survey of ICIC techniques in LTE networks under various mobile environment parameters

LTE networks’ main challenge is to efficiently use the available spectrum, and to provide satisfying quality of service for mobile users. However, using the same bandwidth among adjacent cells leads to occurrence of Inter-cell Interference especially at the cell-edge. Basic interference mitigation approaches consider bandwidth partitioning techniques between adjacent cells, such as frequency reuse of factor m schemes, to minimize cell-edge interference. Although SINR values are improved, such techniques lead to significant reduction in the maximum achievable data rate. Several improvements have been proposed to enhance the performance of frequency reuse schemes, where restrictions are made on resource blocks usage, power allocation, or both. Nevertheless, bandwidth partitioning methods still affect the maximum achievable throughput. In this proposal, we intend to perform a comprehensive survey on Inter-Cell Interference Coordination (ICIC) techniques, and we study their performance while putting into consideration various design parameters. This study is implemented throughout intensive system level simulations under several parameters such as different network loads, radio conditions, and user distributions. Simulation results show the advantages and the limitations of each technique compared to frequency reuse-1 model. Thus, we are able to identify the most suitable ICIC technique for each network scenario.