A subspace matching color filter design methodology for a multispectral imaging system.

In this paper, we present a methodology to design filters for an imaging system to improve the accuracy of the spectral measurements for families of reflective surfaces. We derive the necessary and sufficient conditions that the sensor space of the system must obey in order to measure the spectral reflectance of the surfaces accurately. Through simulations, we show how these conditions can be applied to design filters using a set of sample spectral data acquired from extracted teeth. For this set of data, we also compare our results to those of Wolski's method, a conventional filter design method which produces filters that recover tristimulus values of surfaces accurately under several illuminants. We show that our method produces filters that capture the spectral reflectance better given the same number of measurements. The errors in predicting the color of the sample data are much lower under every test illuminant when the filters designed with our method are used.     

Power and Speed-Efficient Code Transformation of Video Compression Algorithms for RISC Processors

Upcoming multi-media compression applications will require high memory bandwidth. In this paper, we estimate that a software reference implementation of an MPEG-4 video decoder typically requires 200 Mtransfers/s to memory to decode 1 CIF (352×288) Video Object Plane (VOP) at 30 frames/s. This imposes a high penalty in terms of power but also performance.However, we also show that we can heavily improve on the memory transfers, without sacrificing speed (even gaining about 10% on cache misses and cycles for a DEC Alpha), by aggressive code transformations. For this purpose, we have manually applied an extended version of our data transfer and storage exploration (DTSE) methodology, which was originally developed for custom hardware implementations.     

Increasing inequalities in what we do online: A longitudinal cross sectional analysis of Internet activities among the Dutch population (2010 to 2013) over gender,age, education,and income

We investigate types of Internet activities among a representative sample of the Dutch population from 2010 to 2013. We examined usage patterns of seven types of Internet activities (i.e., information, news, personal development, commercial transaction, social interaction, leisure, and gaming) and related these patterns with gender, age, education, and income. Activities related to news, personal development, commercial transaction, and social interaction increased in popularity. For most capital enhancing activities, men, younger people, higher educated people, and people with higher than average incomes were prominent. These observations, however, are subject to change. The Internet seems to provide increasingly more capital-enhancing opportunities for those with higher education and income, which would accordingly reinforce their already strong positions in society.     

A Scalable Architecture for MPEG-4 Wavelet Quantization

Wavelet-based image compression has been adopted in MPEG-4 for visual texture coding. All wavelet quantization schemes in MPEG-4—Single Quantization (SQ), Multiple Quantization (MQ) and Bi-level Quantization—use Embedded Zero Tree (EZT) coding followed by an adaptive arithmetic coder for the compression and quantization of a wavelet image. This paper presents the OZONE chip, a dedicated hardware coprocessor for EZT and arithmetic coding. Realized in a 0.5 m CMOS technology and operating at 32 MHz, the EZT coder is capable of processing up to 25.6 Mega pixel-bitplanes per second. This is equivalent to the lossless compression of 31.6 8-bit grayscale CIF images (352 × 288) per second. The adaptive arithmetic coder processes up to 10 Mbit per second. The combination of the performance of the EZT coder and the arithmetic coder allows the OZONE to perform visual-lossless compression of more than 30 CIF images per second. Due to its novel and scalable architecture, parallel operation of multiple OZONEs is supported. The OZONE functionality is demonstrated on a PC-based compression system.     

Determination of Thermoelectric Module Efficiency: A Survey

The development of thermoelectrics (TE) for energy conversion is in the transition phase from laboratory research to device development. There is an increasing demand to accurately determine the module efficiency, especially for the power generation mode. For many TE, the figure of merit, ZT, of the material sometimes cannot be fully realized at the device level. Reliable efficiency testing of thermoelectric modules is important to assess the device ZT and provide end-users with realistic values for how much power can be generated under specific conditions. We conducted a general survey of efficiency testing devices and their performance. The results indicated a lack of industry standards and test procedures. This study included a commercial test system and several laboratory systems. Most systems are based on the heat flow meter method, and some are based on the Harman method. They are usually reproducible in evaluating thermoelectric modules. However, different systems often showed large differences that are likely caused by uncertain heat loss and thermal resistance. Efficiency testing is an important capability for the thermoelectric community to improve. A follow-up international standardization effort is planned.     

A low-power 2/5.8-GHz dual-wide-band CMOS LC-VCO with switched-inductor technique

A fully integrated dual-band LC voltage control oscillator, designed in a 0.18-µm CMOS technology for 5.8-GHz/2.0-GHz wireless communication applications, is described. The frequency band switching is accomplished with switched-inductor technique. The dual-band oscillator can be operated in 5.38–6.23?GHz and 1.78–2.07?GHz with 15% frequency tuning range. Two different inductors are used for the frequency band switching. Frequency tuning is implemented by varying the capacitance of a MOS varactor. The measured phase noise is ?109?dBc/Hz @ 1?MHz and ?112?dBc/Hz @ 1?MHz for frequency at 5.8?GHz and 2?GHz, respectively. This oscillator is fabricated in UMC's 0.18-µm one-poly-six-metal 1.8?V process. The power dissipation of this dual-band VCO is 11.7 and 9.3?mW for oscillation frequency of 2?GHz and 5.8?GHz, respectively.     

Vapor Phase Growth of Functional Pentacene Films at Atmospheric Pressure

Compared to traditional vacuum evaporation techniques for small organic molecules, organic vapor phase deposition (OVPD) possesses a extra processing parameter: the pressure of process gas P_ch. Here, the influence of large P_ch variations (from 0.1 mbar to atmospheric pressure) on pentacene thin film growth is explored. OVPD operation at higher P_ch is characterized by lower carrier gas velocities and lower organic diffusivities. These result in an invariance of the material utilization efficiency over the entire pressure span and in an advantageous equilibrium evaporation regime in the source. An increase in P_ch yields rough pentacene layers. Classical nucleation theory is applied to demonstrate how the pressure rise triggers homogeneous nucleation in the gas phase, causing the observed roughening. The use of lower deposition rates, higher dilution flow rates, and higher substrate temperatures result in the suppression of gas phase nucleation and the growth of smooth pentacene films at atmospheric pressure. Using these optimized conditions, state‐of‐the‐art pentacene thin film transistors with saturation mobilities above 0.9 cm²/Vs are reproducibly fabricated. p‐Type circuits are also made and a 19‐stage ring oscillator with a stage delay of 51 μs at a supply voltage of 15 V is demonstrated.     

改革模拟实验教学和考试方法的尝试

模拟电子线路实验课对于电子线路教学改革和提高学生的工程实践能力具有重要作用。本文阐述了模拟实验课单独设课后教学及考试方法的改革尝试以及教学体会和教学效果。     

A 640 by 480 Pixels Readout Circuit for IR Imaging

A readout circuit for a 640 × 480 pixels FPA (focal plane array) has been successfully designed, fabricated and tested. The circuit solution is based on a per pixel source-follower direct injection (SFDI) pre-amplifier. Signal multiplexing is performed in both X and Y direction. The pixel size is 25 m × 25m. The chip is optimized for a QWIP (quantum well infrared photodetector) operating at a temperature of 70 K. The circuit has been realized in a standard 0.8 m CMOS process.     

Fully Integrated Low Phase-Noise VCOs: From Special Processing to Standard CMOS

An overview is given on the several options for and problems associated with creating high-quality integrated inductors for VCOs. Special processing techniques are reported that can enhance the performance of a normal planar inductor coil. Bonding Wire inductors are presented as an alternative, that allows state-of-the-art phase noise performance at no extra cost. Finally, it is shown that by thorough analysis of standard planar inductors with finite-element simulations, performances can be achieved that are even better than structures requiring extra processing cost. This is done despite a low-ohmic substrate with only two metal layers.