InGaAsP microdisk lasers on AlxOy

InGaAsP microdisk lasers are fabricated on Al_xO_y by wafer fusion. Room-temperature continuous-wave operation with threshold pump power of 1.13 mW has been achieved from a 2.2-μm diameter microdisk laser. The lasing wavelength with incident pump power redshifts at a rate of 0.28 nm/mW which shows the improved thermal characteristics due to the high thermal conductivity of Al_xO _y bottom layer     

Configurable Media Codec Framework： A Stepping Stone for Fast and Stable Codec Development

Recent advances in reconfigurable computing have led to new ways of implementing complex algorithms while maintaining reasonable throughput.Video codecs are becoming more complex in order to provide efficient compression for video with ever-increasing resolution.This problem is compounded by the fact that spectra of video decoding devices has become wider in the move from traditional TV to cable and satellite TV,IPTV,mobile TV,and Internet media.MPEG is tackling this problem with a reconfigurable video coding(RVC) framework and is standardizing a modular definition of tools and connections.MPEG’s work started with video coding and has recently extended to graphics data coding.RVC will be supported by non-MPEG standards such as the Chinese audio-video standard(AVS).This article gives a brief background to the reconfigurable codec framework.The key to this framework is reconfigurability and reducing granularity to find commonality between different standards.     

Selective and nonselective wet etching of Zn0.9Mg0.1O/ZnO

Wet etch rates at 25°C for Zn_0.9Mg_0.1O grown on sapphire substrates by pulsed laser deposition (PLD) were in the range 300–1100 nm · min⁻¹ with HCl/H₂O (5×10⁻³−2×10⁻² M) and 120–300 nm · min⁻¹ with H₃PO₄/H₂O (5×10⁻³−2×10⁻² M). Both of these dilute mixtures exhibited diffusion-limited etching, with thermal activation energies of 2–3 kCal · mol⁻¹. By sharp contrast, the etch rates for ZnO also grown on sapphire by PLD were much slower in similar solutions, with rates of 1.2–50 nm · min⁻¹ in HCl/H₂O (0.01–1.2 M) and 12–54 nm · min⁻¹ in H₃PO₄/H₂O (0.02–0.15 M). The etching was reaction limited over the temperature range 25–75°C, with activation energies close to 6 kCal · mol⁻¹. The resulting selectivity of Zn_0.9Mg_0.1O over ZnO can be a high as ∼400 with HCl and ∼30 with H₃PO₄.     

elemental redistribution and interfacial reaction mechanism for the flip chip Sn-3.0Ag-(0.5 or 1.5)Cu solder bump with Al/Ni(V)/Cu under-Bump metallization during aging

In flip chip technology, Al/Ni(V)/Cu under-bump metallization (UBM) is currently applicable for Pb-free solder, and Sn−Ag−Cu solder is a promising candidate to replace the conventional Sn−Pb solder. In this study, Sn-3.0Ag-(0.5 or 1.5)Cu solder bumps with Al/Ni(V)/Cu UBM after assembly and aging at 150°C were employed to investigate the elemental redistribution, and reaction mechanism between solders and UBMs. During assembly, the Cu layer in the Sn-3.0Ag-0.5Cu joint was completely dissolved into solders, while Ni(V) layer was dissolved and reacted with solders to form (Cu_1−y,Ni_y)₆Sn₅ intermetallic compound (IMC). The (Cu_1−y,Ni_y)₆Sn₅ IMC gradually grew with the rate constant of 4.63 × 10⁻⁸ cm/sec^0.5 before 500 h aging had passed. After 500 h aging, the (Cu_1−y,Ni_y)₆Sn₅ IMC dissolved with aging time. In contrast, for the Sn-3.0Ag-1.5Cu joint, only fractions of Cu layer were dissolved during assembly, and the remaining Cu layer reacted with solders to form Cu₆Sn₅ IMC. It was revealed that Ni in the Ni(V) layer was incorporated into the Cu₆Sn₅ IMC through slow solid-state diffusion, with most of the Ni(V) layer preserved. During the period of 2,000 h aging, the growth rate constant of (Cu_1−y,Ni_y)₆Sn₅ IMC was down to 1.74 × 10⁻⁸ cm/sec^0.5 in, the Sn-3.0Ag-1.5Cu joints. On the basis of metallurgical interaction, IMC morphology evolution, growth behavior of IMC, and Sn−Ag−Cu ternary isotherm, the interfacial reaction mechanism between Sn-3.0Ag-(0.5 or 1.5)Cu solder bump and Al/Ni(V)/Cu UBM was discussed and proposed.     

Effects of contact electrode size on the characteristics of polycrystalline-Si p-i-n solar cells

The effects of contact electrode size on the photo-voltaic characteristics of polycrystalline-Si p-i-n solar cells have been studied,with respect to a unit-cell pitch size of 1μm width.For the non-transparent Al contact electrode with a contact width of 0.05-0.2μm,the short-circuit current is obviously reduced with increasing contact width,due to a larger area of optical reflection by the electrode.On the other hand,even when using a transparent ITO(indium-tin-oxide) electrode,a larger width of contact e...     

Conductive adhesive with transient liquid‐phase sintering technology for high‐power device applications

A highly reliable conductive adhesive obtained by transient liquid‐phase sintering (TLPS) technologies is studied for use in high‐power device packaging. TLPS involves the low‐temperature reaction of a low‐melting metal or alloy with a high‐melting metal or alloy to form a reacted metal matrix. For a TLPS material (consisting of Ag‐coated Cu, a Sn96.5‐Ag3.0‐Cu0.5 solder, and a volatile fluxing resin) used herein, the melting temperature of the metal matrix exceeds the bonding temperature. After bonding of the TLPS material, a unique melting peak of TLPS is observed at 356 °C, consistent with the transient behavior of Ag₃Sn + Cu₆Sn₅ → liquid + Cu₃Sn reported by the National Institute of Standards and Technology. The TLPS material shows superior thermal conductivity as compared with other commercially available Ag pastes under the same specimen preparation conditions. In conclusion, the TLPS material can be a promising candidate for a highly reliable conductive adhesive in power device packaging because remelting of the SAC305 solder, which is widely used in conventional power modules, is not observed.     

Combined spatial-temporal energy harvesting and relay selection for cognitive wireless powered networks

In order to improve the Energy Efficiency (EE) and spectrum utilization of Cognitive Wireless Powered Networks (CWPNs), a combined spatial-temporal Energy Harvesting (EH) and relay selection scheme is proposed. In the proposed scheme, for protecting the Primary User (PU), a two-layer guard zone is set outside the PU based on the outage probability threshold of the PU. Moreover, to increase the energy of the CWPNs, the EH zone in the two-layer guard zone allows the Secondary Users (SUs) to spatially harvest energy from the Radio Frequency (RF) signals of temporally active PUs. To improve the utilization of the PU spectrum, the guard zone outside the EH zone allows for the constrained power transmission of SUs. Moreover, the relay selection transmission is designed in the transmission zone of the SU to improve the EE of the CWPNs. In addition to the EE of the CWPNs, the outage probabilities of the SU and PU are derived. The results reveal that the setting of a two-layer guard zone can effectively reduce the outage probability of the PU and improve the EE of CWPNs. Furthermore, the relay selection transmission decreases the outage probabilities of the SUs.     

Class-limited algorithm for supporting QoS and fairness in Ethernet passive optical network

Ethernet passive optical network (EPON) becomes a key technology for the next generation broadband access networks due to its cost-effectiveness and high data rate. One of the research issues in EPON is to support service differentiation and fairness. For service differentiation, the conventional limited algorithm is extended with strict priority queuing (SPQ). However, due to ONU-bounded bandwidth allocation, those extensions from the limited algorithm have difficulties in supporting QoS and fairness when the uplink is instantaneously overloaded. To overcome the disadvantages of ONU-bounded bandwidth allocation, instead of allocating the bandwidth on per ONU basis, the proposed class-limited algorithm allocates the bandwidth on per service class basis. Our simulations show that the class-limited algorithm is more efficient to differentiate services and to fairly share residual bandwidth than other limited schemes combined with SPQ, particularly for instantaneous overload condition.     

A high efficiency transmitter and receiver for magnetic resonant wireless battery charging system in 0.35 μm BCD

This paper presents a transmitter and receiver for magnetic resonant wireless battery charging system. In the receiver, a wide-input range CMOS multi-mode active rectifier is proposed for a magnetic resonant wireless battery charging system. The configuration is automatically changed with respect to the magnitude of the input AC voltage. The output voltage of the multi-mode rectifier is sensed by a comparator. Furthermore, the configuration of the multi-mode rectifier is automatically selected by switches as original rectifier mode, 1-stage voltage multiplier or 2-stage voltage multiplier mode. As a result, a rectified DC voltage is output from 7.5 to 19 V for an input AC voltage of 5–20 V. In the transmitter, a class-E power amplifier (PA) with an automatic power control loop and load compensation circuit is proposed to improve the power efficiency. The transmitted power is controlled by adjusting the signal applied to the gate of the power control transistor. In addition, a parallel capacitor is also controlled to enhance the efficiency and compensate for the load variation. This chip is implemented using 0.35 μm BCD technology with an active area of around 5,000 × 2,500 μm. When the magnitude of the input AC voltage is 10 V, the power conversion efficiency of the multi-mode active rectifier is about 94 %.The maximum power efficiency of the receiver is about 70 %. The transmitter provides an output power control range of 10–30.2 dBm. The maximum power efficiency of the PA is 71.5 %.     

Simultaneous Static Testing of A/D and D/A Converters Using a Built‐in Structure

Static testing of analog‐to‐digital (A/D) and digital‐to‐analog (D/A) converters becomes more difficult when they are embedded in a system on chip. Built‐in self‐test (BIST) reduces the need for external support for testing. This paper proposes a new static BIST structure for testing both A/D and D/A converters. By sharing test circuitry, the proposed BIST reduces the hardware overhead. Furthermore, test time can also be reduced using the simultaneous test strategy of the proposed BIST. The proposed method can be applied in various A/D and D/A converter resolutions and analog signal swing ranges. Simulation results are presented to validate the proposed method by showing how linearity errors are detected in different situations.