Dynamics of gas-particle flow in circulating fluidized beds

The flow of gas—particle mixtures in a circulating fluidized bed has been studied, probing the flow behavior under both stable and unstable operating conditions. A novel feature of our work is the use of electrical capacitance tomography to image particle distribution over the cross-section at one elevation in the standpipe. In addition, we have also obtained data on pressure profile and aeration rate in the standpipe, particle circulation rate in the circulating fluidized bed and riser gas flow rate under various operating conditions. Here, we report experimental results obtained for two different particles, both belonging to Geldart type A. At low aeration rates, a stable dense phase flow is obtained in the standpipe. At high aeration rates, the flow became unstable, manifesting low frequency oscillations in the flow characteristics. Our results suggest that, under conditions explored in the present study, this instability originates in the standpipe and that any attempt to model it should consider the interaction between the various components of the circulating fluidized bed system.     

High speed architectures for Leviathan: a binary tree based stream cipher

Connectionless routed networks, built atop high-speed communication medium, require cryptographic algorithms capable of out-of-order keystream generation and high throughput. Binary tree based stream ciphers, of which Leviathan is an example, are capable of meeting both of these requirements. We investigate high-speed architectures for the binary tree traversal and show that the traversal approaches discussed can be extended to m-ary tree of height h. Of the two architectures presented, the pipeline architecture computes keystream at uniform rate and the parallel architecture bounds the worst-case variance in the time period between computations of consecutive output key words, which form the keystream. The design and implementation of Leviathan keystream generator based on the pipeline architecture for binary tree traversal are presented. We show that it is possible to achieve keystream generation rates approaching 1 Gbps with the pipeline architecture. The design was implemented in two parts, the keysetup and the keystream pipeline, targeting commercially available Xilinx XC2V4000 and XC2V3000 FPGAs. The keystream pipeline implementation operated at frequency of 50 MHz and occupied 6864 slices. The results were verified performing the timing simulation.     

Exhaust emissions control and engine parameters optimization using artificial neural network virtual sensors for a hydrogen-powered vehicle

This paper presents an alternative tool for vehicle tuning applications by incorporating the use of artificial neural network (ANN) virtual sensors for a hydrogen-powered car. The objective of this study is to optimize simple engine process parameters to regulate the exhaust emissions. The engine process parameters (throttle position, lambda, ignition advance and injection angle) and the exhaust emission variables (CO, CO₂, HC and NO_x) form the basis of the virtual sensors. Experimental data were first obtained through a comprehensive experimental and tuning procedure for neural network training and validation. The optimization layer-by-layer neural network was used to construct two ANN virtual sensors; the engine and emissions models. The performance and accuracy of the proposed virtual sensors were found to be acceptable with the maximum predictive mean relative errors of 0.65%. With its accurate predictive capability, the virtual sensors were then employed and simulated as a measurement tool for vehicle tuning and optimization. Simulation results showed that the exhaust emissions can be regulated by optimizing simple engine process parameters. This study presents an alternative tool for vehicle tuning applications for a hydrogen-powered vehicle. In addition, this work also provided a tool to better understand the effects of various engine conditions on the exhaust emissions without the need for any vehicle modifications.     

Smoking cessation by socioeconomic status and marital status: the contribution of smoking behavior and family background.

We studied socioeconomic status and marital status as predictors of smoking cessation, adjusting for previous smoking behavior and family background by using a large Finnish prospective twin dataset unselected for smoking behavior. The data were collected by postal surveys in 1981 and 1990, and the sample comprised 3,069 current smokers, of whom 20% had quit smoking by 1990. Logistic regression analyses of all twin individuals and conditional logistic regression analysis of discordant pairs were used to predict smoking cessation. High education predicted smoking cessation among both men (OR=2.32, 95% CI=1.31-4.10) and women (OR=3.98, 95% CI=1.85-8.51) as did high social class among women. Additionally, starting at a late age, smoking a small number of cigarettes per day, and a low level of nicotine per cigarette predicted cessation. Socioeconomic differences in cessation diminished only slightly when we adjusted for smoking behavior factors. Among the twin pairs who were discordant in terms of smoking cessation, the twin who continued smoking also smoked more on average at baseline (men: OR=.94, 95% CI=.89-.99; women: OR=.82, 95% CI=.71-.94). The male twins who continued smoking had a smaller probability of getting married during the follow-up than had the cotwin who had quit smoking (OR=3.91, 95% CI=1.02-15.02). Indicators of socioeconomic status were important predictors of smoking cessation even when we adjusted for previous smoking behavior. For men, marriage was associated with an increased probability of cessation     

Asian Mussel Watch Program: contamination status of polybrominated diphenyl ethers and organochlorines in coastal waters of Asian countries

Mussel samples were used in this study to measure the levels of polybrominated diphenyl ethers (PBDEs) and organochlorines (OCs) in the coastal waters of Asian countries like Cambodia, China, Hong Kong, India, Indonesia, Japan, Korea, Malaysia, the Philippines, and Vietnam. PBDEs were detected in all the samples analyzed, and the concentrations ranged from 0.66 to 440 ng/g lipid wt. Apparently higher concentrations of PBDEs were found in mussels from the coastal waters of Korea, Hong Kong, China, and the Philippines, which suggests that significant sources of these chemicals exist in and around this region. With regard to the composition of PBDE congeners, BDE-47, BDE-99, and BDE-100 were the dominant congeners in most of the samples. Among the OCs analyzed, concentrations of DDTs were the highest followed by PCBs > CHLs > HCHs > HCB. Total concentrations of DDTs, PCBs, CHLs, and HCHs in mussel samples ranged from 21 to 58 000, 3.8 to 2000, 0.93 to 900, and 0.90 to 230 ng/g lipid wt., respectively. High levels of DDTs were found in mussels from Hong Kong, Vietnam, and China; PCBs were found in Japan, Hong Kong, and industrialized/urbanized locations in Korea, Indonesia, the Philippines, and India; CHLs were found in Japan and Hong Kong; HCHs were found in India and China. These countries seem to play a role as probable emission sources of corresponding contaminants in Asia and, in turn, may influence their global distribution.     

An investigation of engine performance parameters and artificial intelligent emission prediction of hydrogen powered car

With the depletion of fossil fuel resources and the potential consequences of climate change due to fossil fuel use, much effort has been put into the search for alternative fuels for transportation. Although there are several potential alternative fuels, which have low impact on the environment, none of these fuels have the ability to be used as the sole “fuel of the future”. One fuel which is likely to become a part of the over all solution to the transportation fuel dilemma is hydrogen. In this paper, The Toyota Corolla four cylinder, 1.8 l engine running on petrol is systematically converted to run on hydrogen. Several ancillary instruments for measuring various engine operating parameters and emissions are fitted to appraise the performance of the hydrogen car. The effect of hydrogen as a fuel compares with gasoline on engine operating parameters and effect of engine operating parameters on emission characteristics is discussed. Based on the experimental setup, a suite of neural network models were tested to accurately predict the effect of major engine operating conditions on the hydrogen car emissions. Predictions were found to be ±4% to the experimental values. This work provided better understanding of the effect of engine process parameters on emissions.     

A heterogeneous built-in self-repair approach using system-level synthesis flexibility

Summary and Conclusions -A novel methodology is proposed for designing fault-tolerant real-time multi-processor systems-on-a-chip to achieve optimal productivity. The methodology employs the heterogeneous built-in-self-repair (BISR) based on graceful degradation and yield enhancement techniques as an embedded optimization engine. The technique exploits the flexibility provided in task-level scheduling and algorithm selection steps. A hardware fault model is developed for modern super-scalar processors and multi-processors which enables an efficient treatment of the synthesis and compilation goals. For the first time, heterogeneous BISR is used at the task level. The key idea is to adapt scheduling and algorithm selection to the available nonfaulty resources. If there is a fault in memory, the algorithms that use less memory are selected and the scheduler exploits the other abundant resource, viz, the processors, more vigorously to compensate for the loss of part of memory. Similarly, a fault in a processor is backed up by memory. The synthesis approach minimizes the degradation in performance for single or multiple faults using simulated annealing-based algorithm selection, scheduling, and assignment algorithms. On the large set of examples this adaptive algorithm selection and scheduling technique has achieved important improvement of throughput compared to conventional nonadaptive schemes. The experimental results also indicate that important improvement in productivity can be achieved by using the extra throughput gained from the technique.     

Towards Nanoelectronics Processor Architectures

In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliable nanoelectronic devices, fault tolerance schemes are required so as to ensure the basic correctness of any computation. Since any fault tolerance approach demands redundancy either in the form of time or hardware, reliability needs to be considered in conjunction with the performance and hardware tradeoffs. We propose a new computational model for the nanoelectronics based processor architectures, that provides flexible fault tolerance to deal with the high and time varying faults. The model guarantees the correctness of instruction executions, while dynamically balancing hardware and performance overheads. The correctness of every instruction is confirmed by multiple execution instances through a hybrid hardware-time redundancy approach. To achieve high system performance, multiple unconfirmed computation branches are exploited in a speculative manner. Hardware resource growth that these speculative computations entail is controlled so that the utilization of hardware is balanced between the two competing goals of performance and fault tolerance. In addition, we examine the impact on the proposed computational model of other nanoelectronic characteristics such as the necessity for localization of interconnections and the regularity of nanofabric structures on the proposed computational model. We set up an experimental framework to validate the effectiveness of the proposed scheme as well as to investigate multiple tradeoff points within the proposed approach. Simulation data confirm that the proposed computational model achieves the goal of providing flexible fault tolerance under a wide range of fault occurrence rates, while at the same time guaranteeing high system performance and efficient utilization of hardware resources.