SOA-based regenerative amplification of phase-noise-degraded DPSK signals: dynamic analysis and demonstration

A theoretical analysis and an experimental demonstration of semiconductor optical amplifier (SOA)-based regenerative amplification (SORA) of phase noise (PN)-degraded return-to-zero (RZ) differential phase-shift keying (DPSK) signals are presented. The Q-factor improvement is 1.6 dB in single-channel and about 0.8 dB in two non-demultiplexed-channel regimes. The key physical mechanism that enables regeneration by the SORA is the discriminative gain provided by the SOA for the logical 0s versus the logical 1s when two mutually antisymmetric ON-OFF keying (OOK) data trains, created by the DPSK signal, collide in the SOA. The modeling results agree with the experiment.     

Highly Reliable Charge Trap-Type Organic Non-Volatile Memory Device Using Advanced Band-Engineered Organic-Inorganic Hybrid Dielectric Stacks

With the recent interest in data storage in flexible electronics, highly reliable charge trap-type organic-based non-volatile memory (CT-ONVM) has attracted much attention. CT-ONVM should have a wide memory window, good endurance, and long-term retention characteristics, as well as mechanical flexibility. This paper proposed CT-ONVM devices consisting of band-engineered organic–inorganic hybrid films synthesized via an initiated chemical vapor deposition process. The synthesized poly(1,3,5-trimethyl-1,3,5,-trivinyl cyclotrisiloxane) and Al hybrid films are used as a tunneling dielectric layer and a blocking dielectric layer, respectively. For the charge trapping layer, different Hf, Zr, and Ti hybrids are examined, and their memory performances are systematically compared. The best combination of hybrid dielectric stacks showed a wide memory window of 6.77 V, good endurance of up to 10⁴ cycles, and charge retention of up to 71% after 10⁸ s even under the 2% strained condition. The CT-ONVM device using the hybrid dielectric stacks outperforms other organic-based charge trap memory devices and is even comparable in performance to conventional inorganic-based poly-silicon/oxide/nitride/oxide/silicon structures devices. The CT-ONVM using hybrid dielectrics can overcome the inherent low reliability and process complexity limitations of organic electronics and expedite the realization of wearable organic electronics.     

Immunoregulation of Macrophages by Controlling Winding and Unwinding of Nanohelical Ligands

Developing materials with the capability of changing their innate features can help to unravel direct interactions between cells and ligand-displaying features. This study demonstrates the grafting of magnetic nanohelices displaying cell-adhesive Arg-Gly-Asp (RGD) ligand partly to a material surface. These enable nanoscale control of rapid winding (“W”) and unwinding (“UW”) of their nongrafted portion, such as directional changes in nanohelix unwinding (lower, middle, and upper directions) by changing the position of a permanent magnet while keeping the ligand-conjugated nanohelix surface area constant. The unwinding (“UW”) setting cytocompatibility facilitates direct integrin recruitment onto the ligand-conjugated nanohelix to mediate the development of paxillin adhesion assemblies of macrophages that stimulate M2 polarization using glass and silicon substrates for in vitro and in vivo settings, respectively, at a single cell level. Real time and in vivo imaging are demonstrated that nanohelices exhibit reversible unwinding, winding, and unwinding settings, which modulate time-resolved adhesion and polarization of macrophages. It is envisaged that this remote, reversible, and cytocompatible control can help to elucidate molecular-level cell–material interactions that modulate regenerative/anti-inflammatory immune responses to implants.     

Polymer‐Stabilized Chromonic Liquid‐Crystalline Polarizer

Robust coatable polarizer is fabricated by the self‐assembly of lyotropic chromonic liquid crystals and subsequent photo‐polymerizing processes. Their molecular packing structures and optical behaviors are investigated by the combined techniques of microscopy, scattering and spectroscopy. To stabilize the oriented Sunset Yellow FCF (H‐SY) films and to minimize the possible defects generated during and after the coating, acrylic acid (AA) is added to the H‐SY/H₂O solution and photo‐polymerized. Utilizing cross‐polarized optical microscopy, phase behaviors of the H‐SY/H₂O/AA solution are monitored by varying the compositions and temperatures of the solution. Based on the experimental results of two‐dimensional wide angle X‐ray diffraction and selected area electron diffraction, the H‐SY crystalline unit cell is determined to be a monoclinic structure with the dimensions of a = 1.70 nm, b = 1.78 nm, c = 0.68 nm, α = β = 90.0° and γ = 84.5°. The molecular arrangements in the oriented H‐SY films were further confirmed by polarized Fourier‐transform infrared spectroscopy. The polymer‐stabilized H‐SY films show good mechanical and chemical stabilities with a high polarizability. Additionally, patterned polarizers are fabricated by applying a photo‐mask during the photo‐polymerization of AA, which may open new doors for practical applications in electro‐optic devices.     

A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 /spl mu/m CMOS technology

A 24-GHz low-noise amplifier (LNA) was designed and fabricated in a standard 0.18-/spl mu/m CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum noise figure of 3.9 dB at 24.3 GHz. The supply voltage and supply current are 1 V and 14 mA, respectively. To the author's knowledge, this LNA demonstrates the lowest noise figure among the reported LNAs in standard CMOS processes above 20 GHz.     

A simple parameter extraction method of spiral on-chip inductors

Accurate measurement and parameter extraction for spiral inductors are very important in monolithic microwave integrated circuit (MMIC) design. In this paper, we have proposed an easy and simple model parameter extraction method of wide-band on-chip inductor. The simple extraction methodology is applied to extract parameters from the measured S-parameters of spiral inductors fabricated with 0.18-/spl mu/m CMOS technology. Model prediction shows excellent agreement with the measured data over a wide frequency region. Also, the model can be easily integrated in SPICE-compatible simulators because all the elements are frequency independent. This method will provide practical and useful circuit parameters for MMIC design.     

Design of a laminated current cell relocation 12-bit CMOS D/A converter with a high output impedance technique and a merged switching logic

A compact and low power 12-bit 300 MS/s current steering CMOS D/A converter is presented. The architecture of the D/A converter is based on the current steering 6 + 6 segmented type with a laminated current cell relocation technique. In order to improve the linearity and glitch noise, a high output impedance analog current cell is designed. Furthermore, for the purpose of reducing the chip area and power dissipation, a noble merged switching logic and a compact layout technique are proposed. To verify its performance, the chip was fabricated with 0.13 μm thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective chip area is 0.26 mm² (510 × 510 μm) with a power consumption of 100 mW. The measured INL and DNL are within ±3LSB and ±1LSB, respectively. The measured SFDR is about 70 dB, when the input frequency is 1 MHz at a clock frequency of 300 MHz.     

Simple and Accurate Design of Low-Density Parity-Check Codes for Multi-Input Multi-Output Systems

In this paper we design an irregular low-density parity-check (LDPC) code for multiple-input multiple-output (MIMO) systems, using a simple extrinsic information transfer (EXIT) chart method. The MIMO systems considered are the optimal maximum a posteriori probability (MAP) detector and the suboptimal minimum mean square error soft-interference cancellation (MMSE-SIC) detector. The MIMO detector and the LDPC decoder exchange soft information and form a turbo iterative receiver. The EXIT charts are used to obtain the edge degree distribution of the irregular LDPC code which is optimized for the MIMO detector. It is shown that the performance of the designed LDPC code is better than that of conventional LDPC code which was optimized for either the Additive White Gaussian Noise (AWGN) channel or the MIMO channel without an explicit consideration of the given detector structure.     

A CORDIC-based digital protective relay and its architecture

This paper presents new approach for a hardware architecture for a digital protective relay. All functions for the measurements and relay co-ordination can be calculated with a generalized COordinate Rotation DIgital Computer (CORDIC) algorithm instead of by approximation and extrapolation. The resulting protective relay has higher processing capability making it more able to handle parallel multi-channel sources than existing digital/numerical relays are. Co-ordination accuracy can be also improved by the use of the CORDIC algorithm. This architecture was successfully implemented in a 0.35 μm CMOS technology and then verified.