Increase in photovoltaic performances of dye-sensitized solar cells—Modification of interface between TiO2 nano-porous layers and F-doped SnO2 layers

In order to improve the physical and chemical contacts between a porous TiO₂ layer and an F-doped SnO₂ transparent conductive layer (FTO), the surface of the FTO layer is polished. After polishing, the surface roughness decreased. However, light transmittance and sheet resistance did not vary largely. The short circuit current (J_sc) and efficiencies increased after the FTO was polished. It was found that the interfacial charge transfer between a TiO₂ layer and an FTO layer decreased by impedance measurement, which suggests that contacts between an FTO and a TiO₂ layer are improved because of the flatted surfaces or removal of electrical impurities. We propose one of the industrially important phenomena that surface polishing of FTO is one of the ways to increase photovoltaic performances for DSCs.     

All solid-state battery with sulfur electrode and thio-LISICON electrolyte

A high-capacity type of all solid-state battery was developed using sulfur electrode and the thio-LISICON electrolyte. New nano-composite of sulfur and acetylene black (AB) with an average particle size of 1–10 nm was fabricated by gas-phase mixing and showed a reversible capacity of 900 mAh g⁻¹ at a current density of 0.013 mA cm⁻².     

Steam reforming on Ni-samaria-doped ceria cermet anode for practical size solid oxide fuel cell at intermediate temperatures

Direct internal and external reforming operations on Ni-samaria-doped ceria (SDC) anode with the practical size solid oxide fuel cell (SOFC) at intermediate temperatures from 600 to 750 °C are carried out to reveal the reforming activities and the electrochemical activities, being compared with the hydrogen-fueled power generation. The cell performance with direct internal and external steam reforming of methane and their limiting current densities were almost the same irrespective of the progress of reaction in the methane reformate at 700 and 750 °C. The durability test for 5.5 h at 750 °C with direct internal reforming operation confirmed that the cell performance did not deteriorate. The operation temperature of the cell controlled the reforming activities on the anode, and the large size electrode gave rise to high conversion due to the slow space velocity of the steam reforming. Direct internal steam reforming attained sufficient level of conversion for SOFC power generation with methane at 700 and 750 °C on the large Ni-SDC cermet anode.     

First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

We present on-wafer power measurements of 35 nm gate length InP HEMT amplifiers at 330 GHz. Various amplifiers are examined. The maximum output power of 1.78 mW is measured from a three stage amplifier. Additional output power may be possible but limited by our input power source level to saturate amplifiers. This result is the highest frequency on-wafer power measurement we are aware of reported to date, and demonstrates the technique we utilize to be a fast method of evaluating power performance of submillimeter wave amplifiers without the need to package devices.     

Enhanced Hole‐Transporting Behavior of Discotic Liquid‐Crystalline Physical Gels

Discotic liquid‐crystalline (LC) physical gels have been prepared by combining the self‐assembled fibers of a low‐molecular‐weight gelator and semiconducting LC triphenylene derivatives. The hole mobilities of the discotic LC physical gels measured by a time‐of‐flight method become higher than those of LC triphenylenes alone. The introduction of the finely dispersed networks of the gelator in the hexagonal columnar phases may affect the molecular dynamics of the liquid crystals, resulting in the enhancement of hole transporting behavior in the LC gel state.     

Sub-50-nm physical gate length CMOS technology and beyond usingsteep halo

Sub-50-nm CMOS devices are investigated using steep halo and shallow source/drain extensions. By using a high-ramp-rate spike annealing (HRR-SA) process and high-dose halo, 45-nm CMOS devices are fabricated with drive currents of 650 and 300 μA/μm for an off current of less than 10 nA/μm at 1.2 V with T_ox^inv =2.5 nm. For an off current less than 300 nA/μm, 33-nm pMOSFETs have a high drive current of 400 uA/μm. Short-channel effect and reverse short-channel effect are suppressed simultaneously by using the HRR-SA process to activate a source/drain extension (SDE) after forming a deep source/drain (S/D). This process sequence is defined as a reverse-order S/D (R-S/D) formation. By using this formation, 24-nm nMOSFETs are achieved with a high drive current of 800 μA/μm for an off current of less than 300 μA/μm at 1.2 V. This high drive current might be a result of a steep halo structure reducing the spreading resistance of source/drain extensions     

Quantum Oscillations of Thermoelectric Effects in a Pseudo-one-dimensional Electron Gas With a Spin–Orbit Interaction

We consider thermoelectric effects in a pseudo-one-dimensional electron gas (P1DEG) with a spin–orbit interaction (SOI). The SOI splits the dispersion relation of the P1DEG into subbands with an energy gap. We find quantum oscillations in transport coefficients, which coincide with the locations of the subband edges, as a function of the electrochemical potential.     

High-speed demonstration of an output interface driver forsingle-flux quantum systems

The high-speed operation of a one-channel output interface for a single-flux quantum (SFQ) system has been demonstrated. The interface consisted of a Josephson latching driver, a room-temperature semiconductor amplifier, and a decision circuit module. The Josephson latching driver was fabricated by using a 2.5-kA/cm² standard Nb junction process and used to amplify an SFQ pulse into a 5.5-mV level signal at 10 Gb/s. The interface converted the SFQ pulse signal into a nonreturn-to-zero signal having an amplitude of 1 V at 10 Gb/s     

A Novel Approach to Open “Dead Space” and Modify Interfacial Features of Carbon Nanotube Assemblies by a Microwave Shock

Despite 30-year development of carbon nanotube (CNT) based materials, harnessing the outstanding nanoscale properties of individual CNT for macroscale applications remains challenging. High specific surface area, a crucial feature of CNTs, often suffers from the formation of tightly packed bundles with inaccessible “dead space”. Herein, a novel “microwave shock” approach to open the “dead space” trapped within bundles is reported. Employing N₂ ambient during microwave irradiation, CNT bundles undergo an efficient structural alteration and interfacial modification simultaneously due to the strong radiative coupling, while the graphitic structure remains undamaged. In this way, a 15-fold increase (from 42 to 648 m² g⁻¹) in the interstitial surface area as well as the lithiophilic functionalization (≈1 atom% nitrogen doping) are achieved without the degradation of other properties. Furthermore, to highlight the merits of this microwave shock process, the treated CNT films are applied as a host material for the anode in a lithium metal battery and demonstrate the suppression of dendritic lithium growth and improve cycling stability. This microwave shock approach provides an efficient avenue to modify nanocarbon-based materials for further applications.