Finding Multiple Equivalence-Preserving Transformations in Combinational Circuits through Incremental-SAT

This paper introduces an approach to effectively exploit incremental SAT in order to search for multiple equivalence-preserving transformations of combinational circuits. Typical applications, such as redundancy removal with observability and external care conditions, adequate abstractions and other optimizations used in a state-of-the-art SAT-based model checker, can reap benefits from the proposed strategies. Our techniques exploit SAT incrementality, by iteratively refining the set of candidate transformations with a counter-example driven analysis, until an unsatisfiable point is reached. The key point of our technique is the ability to address satisfiable instances first, where SAT solvers are generally much faster than with unsatisfiable runs. We also discuss partitioning and problem reduction issues, that are fundamental in order to provide a scalable approach. Experimental results show the effectiveness of the proposed strategies.     

Millimeter wave inductive post filters,theory and results

This paper briefly details the work carried out on the modelling of inductive post filters. This type of filter approach is particularly attractive at millimeter wave frequencies due to its ease of manufacture, however for modelling no true wide band equivalent circuit would seem to be available. In order to overcome this limitation we have developed a rigorous wide band model. The accuracy of the model has been confirmed by numerous experimental measurements and the resulting computer program quickly enables both analysis and synthesis to be carried out. The speed and efficiency of this approach has allowed the effect of mechanical tolerances to be taken into account, thus reducing cost, complexity and assembly times.     

Single‐Step Deposition of Au‐ and Pt‐Nanoparticle‐Functionalized Tungsten Oxide Nanoneedles Synthesized Via Aerosol‐Assisted CVD,and Used for Fabrication of Selective Gas Microsensor Arrays

Tungsten oxide nanostructures functionalized with gold or platinum NPs are synthesized and integrated, using a single‐step method via aerosol‐assisted chemical vapour deposition, onto micro‐electromechanical system (MEMS)‐based gas‐sensor platforms. This co‐deposition method is demonstrated to be an effective route to incorporate metal nanoparticles (NP) or combinations of metal NPs into nanostructured materials, resulting in an attractive way of tuning functionality in metal oxides (MOX). The results show variations in electronic and sensing properties of tungsten oxide according to the metal NPs introduced, which are used to discriminate effectively analytes (C₂H₅OH, H₂, and CO) that are present in proton‐exchange fuel cells. Improved sensing characteristics, in particular to H₂, are observed at 250 °C with Pt‐functionalized tungsten oxide films, whereas non‐functionalized tungsten oxide films show responses to low concentrations of CO at low temperatures. Differences in the sensing characteristics of these films are attributed to the different reactivities of metal NPs (Au and Pt), and to the degree of electronic interaction at the MOX/metal NP interface. The method presented in this work has advantages over other methods of integrating nanomaterials and devices, of having fewer processing steps, relatively low processing temperature, and no requirement for substrate pre‐treatment.     

Overview of the MPEG Reconfigurable Video Coding Framework

Video coding technology in the last 20 years has evolved producing a variety of different and complex algorithms and coding standards. So far the specification of such standards, and of the algorithms that build them, has been done case by case providing monolithic textual and reference software specifications in different forms and programming languages. However, very little attention has been given to provide a specification formalism that explicitly presents common components between standards, and the incremental modifications of such monolithic standards. The MPEG Reconfigurable Video Coding (RVC) framework is a new ISO standard currently under its final stage of standardization, aiming at providing video codec specifications at the level of library components instead of monolithic algorithms. The new concept is to be able to specify a decoder of an existing standard or a completely new configuration that may better satisfy application-specific constraints by selecting standard components from a library of standard coding algorithms. The possibility of dynamic configuration and reconfiguration of codecs also requires new methodologies and new tools for describing the new bitstream syntaxes and the parsers of such new codecs. The RVC framework is based on the usage of a new actor/ dataflow oriented language called CAL for the specification of the standard library and instantiation of the RVC decoder model. This language has been specifically designed for modeling complex signal processing systems. CAL dataflow models expose the intrinsic concurrency of the algorithms by employing the notions of actor programming and dataflow. The paper gives an overview of the concepts and technologies building the standard RVC framework and the non standard tools supporting the RVC model from the instantiation and simulation of the CAL model to software and/or hardware code synthesis.     

A 1.0-mW, 71-dB SNDR,fourth-order ΣΔ interface circuit for MEMS microphones

In this paper an integrated interface circuit for condenser MEMS microphones is presented. It consists of an input buffer followed by a multi-bit (12-levels), analog, second-order ΣΔ modulator and a fully-digital, single-bit, fourth-order ΣΔ modulator, thus providing a single-bit output signal with fourth order noise shaping, compatible with standard audio chipsets. The circuit, supplied with 3.3 V, exhibits a current consumption of 215 μA for the analog part and 95 μA for the digital part. The measured signal-to-noise and distortion ratio (SNDR) is 71 dB, with an input signal amplitude as large as −1.8 dB with respect to full-scale, obtained thanks to the use of a feed-forward architecture in the analog ΣΔ modulator, which relaxes the voltage swing requirements of the operational amplifiers. The test chip, fabricated in a 0.35-μm CMOS process, occupies an area of 3 mm², including pads.     

Optimized Implementation of RNS FIR Filters Based on FPGAs

In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up Tables (LUTs) available in the Complex Logic Blocks (CLBs) of the new generation FPGAs. Experiments based on the implementation of Finite Impulse Response (FIR) filters characterized by different number of taps and wordlengths shows that the use of RNS together with suitable moduli sets optimally fits the 6-input LUTs in the last generation FPGAs architectures.     

Co-metabolism of citrate and maltose byLactobacillus brevis subsp.lindneri CB1 citrate-negative strain: effect on growth, end-products and sourdough fermentation

Growth, substrates and end-product formation of the maltose and citrate co-metabolization byLactobacillus brevis subsp.lindneri CB1 citrate-negative strain were initially studied in synthetic medium. Compared to maltose (19 g/l) fermentation, the co-metabolization of maltose (10 g/l) plus citrate (9 g/l) caused faster cell growth, increased the concentrations of lactic acid and especially of acetic acid (from 0.7 g/l to 2.9 g/l), produced succinic acid (0.5 g/l) and reduced ethanol synthesis. Highest activities of acetate kinase, the same of lactate dehydrogenase and a reduced alcohol dehydrogenase activity were detected in cytoplasmic extracts of cells growing on maltose plus citrate. The breakdown of citrate depended upon the continuous presence of maltose in the growth medium. Upon depletion of citrate, the cells continued through the normal maltose fermentation, having a diauxic metabolic curve as shown by impedance measurements. Concentrations of citrate from 3 g/l to 15 g/l led to increases of acetic acid from 1.25 g/l to 5.55 g/l. Since maltose was naturally present during sourdough fermentation, the addition of 9 g citrate per kg wheat dough enabled the co-metabolization of maltose and citrate byL. brevis subsp.lindneri CB1. Compared with traditional sourdough fermentation, faster cell growth, a higher acetic acid concentration and a reduced quotient of fermentation were obtained by co-metabolism.