A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-/spl mu/m CMOS

A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW.     

Micro-prober for wafer-level low-noise measurements in MOS devices

Low-frequency noise measurements represent an interesting investigation technique for the characterization of the quality and reliability of microelectronic materials and devices. Performing meaningful noise measurements at low and very low (f<1 Hz) frequencies, however, may be quite challenging, particularly because of the many sources of interference that superimpose on the noise signal. For this reason, packaged samples are preferred because they allow accurate shielding from the external environment, and because keeping the sample in close proximity to the low-noise biasing system and amplifier reduces microphonic and electromagnetic disturbances. Notwithstanding this, the possibility of performing low-frequency noise measurements at wafer level would be quite interesting, both because of the ease of obtaining wafer-level samples from industries with respect to packaged samples, and because this would avoid possible packaging-process induced device degradation. The purpose of this work is to demonstrate that it is, in fact, possible to design and build a dedicated probe system for performing high-sensitivity, low-frequency noise measurements on metal-oxide-semiconductor devices at wafer level.     

Organic Nanoparticles: Preparation,Self‐Assembly,and Properties

The strong tendency of organic nanoparticles to rapidly self‐assemble into highly aligned superlattices at room temperature when solution‐cast from dispersions or spray‐coated directly onto various substrates is described. The nanoparticle dispersions are stable for years. The novel precipitation process used is believed to result in molecular distances and alignments in the nanoparticles that are not normally possible. Functional organic light‐emitting diodes (OLEDs)—which have the same host–dopant emissive‐material composition—with process‐tunable electroluminescence have been built with these nanoparticles, indicating the presence of novel nanostructures. For example, only changing the conditions of the precipitation process changes the OLED emission from green light to yellow.     

Practical OSPF traffic engineering

Open Shortest Path First (OSPF) traffic engineering (TE) is intended to bring long-awaited traffic management capabilities into IP networks, which still rely on today's prevailing routing protocols: OSPF or IS-IS. In OSPF, traffic is forwarded along, and split equally between, equal cost shortest paths. In this letter, we formulate the basic requirements placed on a practical TE architecture built on top of OSPF and present a theoretical framework meeting these requirements of practicality. The main contribution of our work comes from the recognition that coupled with an instance of the maximum throughput problem there exists a related inverse shortest-path problem yielding optimal OSPF link weights.     

Techniques for high-frequency integrated test and measurement

This paper describes techniques for the on-chip measurement of high-frequency and/or high-bandwidth electrical phenomena in ultra large-scale integration environments. The techniques rely on the integration of multiple compact and robust electronic test devices, or cores, at various locations within an integrated circuit. The cores consist primarily of signal generators that approximate the output of a sigma-delta modulator using finite repetitious bit patterns and a small set of highly robust analog components. They are capable of digitizing on-chip signals at gigahertz rates even using low-cost manufacturing processes. Simple communication between the multiple cores enables the migration of many "board-level" type measurements down to the chip level.     

PNNI-based control plane for automatically switched optical networks

Much effort has been spent on the definition of control plane protocols for automatically switched optical networks (ASON). Most of the proposals brought into the standardization for an International Telecommunications Union-Telecommunication Sector, Internet Engineering Task Force, and Optical Internetworking Forum are based on Internet protocol concepts. One such proposal is the generalized multi-protocol label switching (GMPLS), an extension of the MPLS traffic engineering control plane model that includes nonpacket switched technologies (time, wavelength, and fiber switching). Recently, the potential use of private network-network interface (PNNI) in ASONs has been discussed as an alternative proposal by the standardization bodies. The goal of this paper is to appropriately adapt asynchronous transfer mode into an optical PNNI (O-PNNI) protocol that can be used as the control plane of ASONs. The paper also provides a critical viewpoint on the potential usage of either O-PNNI or GMPLS control plane and analyzes the pros and cons of each. The methodology adopted toward devising O-PNNI hinges on reviewing PNNI along with ASON recommendations in order to determine the set of PNNI features that require adaptation. Having identified these features we engineer and present appropriate solutions relating to routing, signaling and addressing aspects.