3D model retrieval using principal plane analysis and dynamic programming

Three dimensional models play an important role in many applications; the problem is how to select the appropriate models from a 3D database rapidly and accurately. In recent years, a variety of shape representations, statistical methods, and geometric algorithms have been proposed for matching 3D shapes or models. In this paper, we propose a 3D shape representation scheme based on a combination of principal plane analysis and dynamic programming. The proposed 3D shape representation scheme consists of three steps. First, a 3D model is transformed into a 2D image by projecting the vertices of the model onto its principal plane. Second, the convex hall of the 2D shape of the model is further segmented into multiple disjoint triangles using dynamic programming. Finally, for each triangle, a projection score histogram and moments are extracted as the feature vectors for similarity searching. Experimental results showed the robustness of the proposed scheme, which resists translation, rotation, scaling, noise, and destructive attacks. The proposed 3D model retrieval method performs fairly well in retrieving models having similar characteristics from a database of 3D models.     

Robust pole clustering in a good ride quality region of aircraft for matrices with structured uncertainties

This paper presents a general analysis of robust pole clustering in a good ride quality region (GRQR) of aircraft for matrices with structured uncertainties. This region is an intersection of a ring and a horizontal strip, located in the left half-plane, which is a specific non-Ω-transformable region providing good ride quality of aircraft. The paper applies the Rayleigh principle along the norm theory to analyze robust pole clustering within this region since the generalized Lyapunov theory is not valid for non-Ω-transformable regions. Concerned uncertainties are structured/parametric uncertainties, including interval matrices. The results are useful for robust control analysis and design, especially, of robust good ride quality of aircraft, shuttles, vehicles and space station, as well as some industrial systems. An example of the F-16 dynamics for which GRQR is suitable is included to illustrate the results.     

Efficient designs of reversible sequential circuits

The Journal of Supercomputing - Recently, the synthesis of reversible sequential circuits has attracted researchers’ attention for implementing low-power logic designs. So far, the direct and...     

Blind estimation of the PN sequence in lower SNR DS-SS signals with residual carrier

This paper presents a method of singular value decomposition (SVD) plus digital phase lock loop (DPLL) to solve the difficult problem of blind pseudo-noise (PN) sequence estimation in low signal to noise ratios (SNR) direct sequence spread spectrum (DS-SS, DS) signals with residual carrier. Of course, the method needs to know the parameters of DS signal, such as the period and code rate of PN sequence. Firstly, the received signal is sampled and divided into non-overlapping signal vectors according to a temporal window, whose duration is two periods of PN sequence. Then, an autocorrelation matrix is computed and accumulated by the signal vectors one by one. The PN sequence with residual carrier can be estimated by the principal eigenvector of this autocorrelation matrix. Furthermore, a DPLL is used to deal with the estimated PN sequence with residual carrier, it estimates and tracks the residual carrier, removes the residual carrier in the end. Theory analysis and computer simulation results show that this method can effectively realize the PN sequence estimation from the input DS signals with residual carrier in lower SNR.     

Register allocation for write activity minimization on non-volatile main memory for embedded systems

Non-volatile memories are good candidates for DRAM replacement as main memory in embedded systems and they have many desirable characteristics. Nevertheless, the disadvantages of non-volatile memory co-exist with its advantages. First, the lifetime of some of the non-volatile memories is limited by the number of erase operations. Second, read and write operations have asymmetric speed or power consumption in non-volatile memory. This paper focuses on the embedded systems using non-volatile memory as main memory. We propose register allocation technique with re-computation to reduce the number of store instructions. When non-volatile memory is applied as the main memory, reducing store instructions will reduce write activities on non-volatile memory. To re-compute the spills effectively during register allocation, a novel potential spill selection strategy is proposed. During this process, live range splitting is utilized to split certain long live ranges such that they are more likely to be assigned into registers. In addition, techniques for re-computation overhead reduction is proposed on systems with multiple functional units. With the proposed approach, the lifetime of non-volatile memory is extended accordingly. The experimental results demonstrate that the proposed technique can efficiently reduce the number of store instructions on systems with non-volatile memory by 33% on average.     

Integer linear programming optimization of joint RRM policies for heterogeneous wireless systems

Wireless systems will be characterized by the coexistence of heterogeneous Radio Access Technologies (RATs) with different, but also complementary, performance and technical characteristics. These heterogeneous wireless networks will provide network operators the possibility to efficiently and coordinately use the heterogeneous radio resources, for which novel Joint Radio Resource Management (JRRM) policies need to be designed. In this context, this work proposes and evaluates a JRRM policy that simultaneously determines for each user an adequate combination of RAT and number of radio resources within such RAT to guarantee the user/service QoS requirements, and efficiently distribute the radio resources considering a user fairness approach aimed at maximizing the system capacity. To this aim, the JRRM algorithm, which takes into account the discrete nature of radio resources, is based on integer linear programming optimization mechanisms.     

Usable optimistic fair exchange

Fairly exchanging digital content is an everyday problem. It has been shown that fair exchange cannot be achieved without a trusted third party (called the Arbiter). Yet, even with a trusted party, it is still non-trivial to come up with an efficient solution, especially one that can be used in a p2p file sharing system with a high volume of data exchanged.We provide an efficient optimistic fair exchange mechanism for bartering digital files, where receiving a payment in return for a file (buying) is also considered fair. The exchange is optimistic, removing the need for the Arbiter’s involvement unless a dispute occurs. While the previous solutions employ costly cryptographic primitives for every file or block exchanged, our protocol employs them only once per peer, therefore achieving an O(n) efficiency improvement when n blocks are exchanged between two peers. Our protocol uses very efficient cryptography, making it perfectly suitable for a p-2-p file sharing system where tens of peers exchange thousands of blocks and they do not know beforehand which ones they will end up exchanging. Therefore, our system yields up to one-to-two orders of magnitude improvement in terms of both computation and communication (40 s vs. 42 min, 1.6 MB vs. 200 MB). Thus, for the first time, a provably secure (and privacy-respecting when payments are made using e-cash) fair exchange protocol can be used in real bartering applications (e.g., BitTorrent) [14] without sacrificing performance.     

Secure authentication scheme for passive C1G2 RFID tags

Privacy and security concerns inhibit the fast adaption of RFID technology for many applications. A number of authentication protocols that address these concerns have been proposed but real-world solutions that are secure, maintain low communication cost and can be integrated into the ubiquitous EPCglobal Class 1 Generation 2 tag protocol (C1G2) are still needed and being investigated. We present a novel authentication protocol, which offers a high level of security through the combination of a random key scheme with a strong cryptography. The protocol is applicable to resource, power and computationally constraint platforms such as RFID tags. Our investigation shows that it can provide mutual authentication, untraceability, forward and backward security as well as resistance to replay, denial-ofth-service and man-in-the-middle attacks, while retaining a competitive communication cost. The protocol has been integrated into the EPCglobal C1G2 tag protocol, which assures low implementation cost. We also present a successful implementation of our protocol on real-world components such as the INTEL WISP UHF RFID tag and a C1G2 compliant reader.     

An efficient IP address lookup algorithm based on a small balanced tree using entry reduction

Due to a tremendous increase in internet traffic, backbone routers must have the capability to forward massive incoming packets at several gigabits per second. IP address lookup is one of the most challenging tasks for high-speed packet forwarding. Some high-end routers have been implemented with hardware parallelism using ternary content addressable memory (TCAM). However, TCAM is much more expensive in terms of circuit complexity as well as power consumption. Therefore, efficient algorithmic solutions are essentially required to be implemented using network processors as low cost solutions.Among the state-of-the-art algorithms for IP address lookup, a binary search based on a balanced tree is effective in providing a low-cost solution. In order to construct a balanced search tree, the prefixes with the nesting relationship should be converted into completely disjointed prefixes. A leaf-pushing technique is very useful to eliminate the nesting relationship among prefixes [V. Srinivasan, G. Varghese, Fast address lookups using controlled prefix expansion, ACM Transactions on Computer Systems 17 (1) (1999) 1-40]. However, it creates duplicate prefixes, thus expanding the search tree.This paper proposes an efficient IP address lookup algorithm based on a small balanced tree using entry reduction. The leaf-pushing technique is used for creating the completely disjointed entries. In the leaf-pushed prefixes, there are numerous pairs of adjacent prefixes with similarities in prefix strings and output ports. The number of entries can be significantly reduced by the use of a new entry reduction method which merges pairs with these similar prefixes. After sorting the reduced disjointed entries, a small balanced tree is constructed with a very small node size. Based on this small balanced tree, a native binary search can be effectively used in address lookup issue. In addition, we propose a new multi-way search algorithm to improve a binary search for IPv4 address lookup. As a result, the proposed algorithms offer excellent lookup performance along with reduced memory requirements. Besides, these provide good scalability for large amounts of routing data and for the address migration toward IPv6. Using both various IPv4 and IPv6 routing data, the performance evaluation results demonstrate that the proposed algorithms have better performance in terms of lookup speed, memory requirement and scalability for the growth of entries and IPv6, as compared with other algorithms based on a binary search.