ADYTIA: Adaptive and Dynamic TCP Interface Architecture for heterogeneous networks

Due to the widespread popularity and usage of Internet of things (IoT)‐enabled devices, there is an exponential increase in the data traffic generated from these IoT devices. Most of these devices communicate with each other using heterogeneous links having constraints such as latency, throughput, and interference from concurrent transmissions. This results in an extra burden on the underlying communication infrastructure to manage the traffic within these constraints between source and destination. However, most of the existing applications use different Transmission Control Protocol (TCP) variants for traffic management between these devices and are dependent on the stage of the sender, irrespective of the application types and link characteristics. Each operating system (OS) has different TCP variant for all applications, irrespective of path characteristics. Hence, a single TCP variant cannot select the best suitable link, which results in degradation in throughput compared to the existing default. Moreover, it cannot use the full capacity of the available link for different applications and network links, especially in heterogeneous network such as IoT. To cope up with these challenges, in this paper, we propose an Adaptive and Dynamic TCP Interface Architecture (ADYTIA). ADYTIA allows the usage of different TCP variants based on application and link characteristics, irrespective of the physical links of the entire path. It allows the usage of different TCP variants based on their design principle across heterogeneous technologies, platforms, and applications. ADYTIA is implemented on NS‐2 and Linux kernel for real testbed experiments. Its ability to select the best suitable TCP variant results in 20% to 80% improvement in throughput compared with the existing default and single TCP variant on Linux and Windows.     

A time-domain noise-coupling technique for continuous-time sigma-delta modulators

In this paper, a time-domain noise-coupling technique based on the pulse width modulation is proposed. The time-domain quantization error is digitally extracted and shaped by an asynchronous digital filter. This digitally filtered quantization error is applied to the quantizer input to increase the modulator’s noise-shaping order. By using this technique in continuous-time sigma-delta modulators, the modulator’s shaping property is significantly enhanced. Comparative analytical calculations and simulation results are presented to estimate the performance of modulators employing the proposed quantizer. System-level simulation results reveal a (L + 2)th order noise-shaping capability of the proposed modulator while it employs only L analog integrators. The effects of main circuit non-idealities in the modulator’s performance are analytically investigated and confirmed by the simulation results.     

Efficient and practical resource block allocation for LTE-based D2D network via graph coloring

In this paper, we construct a practical framework for efficiently allocating long term evolution (LTE) resource blocks (RB) among the users in a device-to-device (D2D) network. For such network that presumably operates under the LTE cellular network, our aim is to improve the overall throughput of D2D connections using opportunistic or fairness-based approach. Taking the practical considerations into account, our proposed framework allows a number of connections to share a single RB whenever possible, thus utilizing the radio resources. To do so, our solution first identifies a superior set of the interference-free D2D reuse groups via graph modeling and graph coloring approach. In particular, we model a D2D network with a two-overlapping disk graph for which a suitable coloring algorithm is proposed and its performance bound is calculated. Once the reuse groups are known, our solution optimizes the RB allocation among these groups based on their reported channel condition as well as the scheduling criterion, whether it is fairness-based or opportunistic. Through numerical experiments, we show that our solution can significantly improve the throughput performance of a D2D network.     

Heteroatom Effect on Star‐Shaped Hole‐Transporting Materials for Perovskite Solar Cells

Three new star‐shaped hole‐transporting materials (HTMs) incorporating benzotripyrrole, benzotrifuran, and benzotriselenophene central cores endowed with three‐armed triphenylamine moieties ( BTP‐1 , BTF‐1 , and BTSe‐1 , respectively) are designed, synthesized, and implemented in perovskite solar cells (PSCs). The impact that the heteroatom‐containing central scaffold has on the electrochemical and photophysical properties, as well as on the photovoltaic performance, is systematically investigated and compared with their sulfur‐rich analogue ( BTT‐3 ). The new HTMs exhibit suitable highest‐occupied molecular orbitals (HOMO) levels regarding the valence band of the perovskite, which ensure efficient hole extraction at the perovskite/HTM interface. The molecular structures of BTF‐1 , BTT‐3 , and BTSe‐1 are fully elucidated by single‐crystal X‐ray crystallography as toluene solvates. The optimized (FAPbI₃)_0.85(MAPbBr₃)_0.15‐based perovskite solar cells employing the tailor‐made, chalcogenide‐based HTMs exhibit remarkable power conversion efficiencies up to 18.5%, which are comparable to the devices based on the benchmark spiro‐OMeTAD. PSCs with BTP‐1 exhibit a more limited power conversion efficiency of 15.5%, with noticeable hysteresis. This systematic study indicates that chalcogenide‐based derivatives are promising HTM candidates to compete efficiently with spiro‐OMeTAD.     

New methods for enhancing fine acquisition in dual folding algorithm of long pseudo noise codes

Long code Direct Sequence Spread Spectrum is a good choice for applications where security and antispoofing ability of a spread spectrum connection is concerned. Due to long period of spreading code, acquisition is a challenge for these systems because a trade‐off between detection probability and acquisition time must be made. For confronting this challenge, various algorithms were proposed in the literature but almost all of them focus on expediting the coarse acquisition. In this paper, we consider the efficient dual folding algorithm for coarse acquisition level and propose 3 methods for enhancing the fine acquisition level leading to faster execution of overall acquisition algorithm. The methods are based on estimations from coarse acquisition level that are not used in conventional algorithms for fine acquisition, ie, zero padding. Theoretical expressions of 2 main comparison criteria in acquisition algorithms, ie, detection probability and mean acquisition time, are derived for conventional zero padding and each of the proposed method. Besides, a coarse estimate of resource consumption is provided by the number of floating point operations for each algorithm to make a useful comparison. Considering these 3 parameters, in comparison, the proposed methods surpass zero padding in 1, 2, or all of the 3 aspects. Simulation agrees well with analytical results.     

Channel estimation based on learning automata for OFDM systems

The abundant benefits of Orthogonal Frequency‐Division Multiplexing and its high flexibility have resulted in its widespread applications in many telecommunication standards. One important parameter for improving wireless system's efficiency is the accurate estimation of channel state information. In the literatures, many techniques have been studied in order to estimate the channel state information. Nowadays, the techniques based on intelligent algorithms such as genetic algorithm and particle swarm optimization (PSO) have attracted attention of researchers. With a very low pilot overhead, these techniques are able to estimate the channel frequency response properly only using the received signals. Unfortunately, each of these techniques suffers a common weakness: they have a slow convergence rate. In this paper, a new intelligent and different method has been presented for channel estimation using learning automata, entitled LA estimator, where the learning automata are search agents, and each pair is responsible for searching 1 complex coefficient of the channel frequency response. This method can achieve an accurate channel estimation with a moderate computational complexity in comparison with GA and PSO estimators. Furthermore, with higher convergence rate, our proposed method is capable of providing the same performance as GA and PSO. For a 2‐path fast fading channel, simulation results demonstrate the robustness of our proposed scheme according to the bit error rate and the mean square error.     

Dependability analysis for characterizing Google cluster reliability

Cloud solutions are emerging as a new suitable way of transforming traditional IT data centers to highly available and reliable computing resources for hosting critical applications and data. However, software and hardware failures are a common problem in cloud datacenters that can lead to harmful damages. In this paper, we analyze the physical server failures in the Google cloud datacenter. We study the Google cluster properties to investigate the relationship among physical servers' failure rate and jobs failure events. The failure rate of Google cluster executed jobs and servers is taken into consideration during a 29‐day period. We present a reliability model for Google cluster physical machines using the continuous time Markov chains according to this observation. We attempt to analyze the obtained model through SHARPE software packages to improve the understanding of failure events in the Google cloud cluster. We also explore the cluster availability based on parameters like steady‐state availability, steady‐state unavailability, mean time to failure, and mean time to repair in the Google cluster.     

Low-Power Symmetrical Rectifier for Passive UHF RFID Transponder

Rectifier design is one of the challenging issues in passive radio-frequency identification (RFID) systems. Differential structures are good candidates as rectifiers to their high conversion efficiencies. In this paper, a novel structure is proposed to produce symmetrical power-supply utilizing differential circuit configuration simulated in 130nm CMOS technology. The proposed rectifier can provide 1.34 V DC power with 382% voltage conversion efficiency, thus demonstrated its higher performance over existing designs.     

CCGA packages for space applications

Commercial-off-the-shelf (COTS) area array packaging technologies in high reliability versions are now being considered for applications, including use in a number of NASA electronic systems being utilized for both the Space Shuttle and Mars Rover missions. Indeed, recently a ceramic package version specifically tailored for high reliability applications was used to provide the processing power required for the Spirit and Opportunity Mars Rovers built by NASA-JPL. Both Rovers successfully completed their 3-months mission requirements and continued exploring the Martian surface for many more moths, providing amazing new information on previous environmental conditions of Mars and strong evidence that water exists on Mars.Understanding process, reliability, and quality assurance (QA) indicators for reliability are important for low risk insertion of these newly available packages in high reliability applications. In a previous investigation, thermal cycle test results for a non-functional daisy-chained peripheral ceramic column grid array (CCGA) and its plastic ball grid array (PBGA) version, both having 560 I/Os, were gathered and are presented here. Test results included environmental data for three different thermal cycle regimes (−55/125 °C, −55/100 °C, and −50/75 °C). Detailed information on these—especially failure type for assemblies with high and low solder volumes—are presented. The thermal cycle test procedure followed those recommended by IPC-9701 for tin–lead solder joint assemblies. Its revision A covers guideline thermal cycle requirements for Pb-free solder joints. Key points on this specification are also discussed.In a recent investigation a fully populated CCGA with 717 I/Os was considered for assembly reliability evaluation. The functional package is a field-programmable gate array that has much higher processing power than its previous version. This new package is smaller in dimension, has no interposer, and has a thinner column wrapped with copper for reliability improvement. This paper will also present thermal cycle test results for assemblies of this and its plastic package version with 728 I/Os, both of which were exposed to four different cycle regimes. Two of these cycle profiles are specified by IPC-9701A for tin–lead, namely, −55 to 100 °C and −55 to 125 °C. One is a cycle profile specified by Mil-Std-883, namely, −65/150 °C, generally used for ceramic hybrid packages screening and qualification. The last cycle is in the range of −120 to 85 °C, a representative of electronic systems directly exposed to the Martian environment without use in a thermal control enclosure. Per IPC-9701A, test vehicles were built using daisy chain packages and were continuously monitored and/or manually checked for opens at intervals. The effects of many process and assembly variables—including corner staking commonly used for improving resistance to mechanical loading such as drop and vibration loads—were also considered as part of the test matrix. Optical photomicrographs were taken at various thermal cycle intervals to document damage progress and behavior. Representative samples of these are presented along with cross-sectional photomicrographs at higher magnification taken by scanning electron microscopy (SEM) to determine crack propagation and failure analyses for packages.