Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic

Differential Cascode Voltage Switch (DCVS) is a well-known logic style, which constructs robust and reliable circuits. Two main strategies are studied in this paper to form static DCVS-based standard ternary fundamental logic components in digital electronics. While one of the strategies leads to fewer transistors, the other one has higher noise margin. New designs are simulated with HSPICE and 32 nm CNTFET technology at various realistic conditions such as different power supplies, load capacitors, frequencies, and temperatures. Simulations results demonstrate their robustness and efficiency even in the presence of PVT variations. In addition, new noise injection circuits for ternary logic are also presented to perform noise immunity analysis.     

Voltage difference engineering in SOI MOSFETs: A novel side gate device with improved electrical performance

We studied the impact of voltage difference engineering in a silicon-on-insulator metal oxide semiconductor field-effect transistor (SOI-MOSFET) and compared the performance to that of a conventional SOI-MOSFET (C-SOI). Our structure, called a SIG-SOI MOSFET, includes main and side gates with an optimum voltage difference between them. The voltage difference leads to an inverted channel as an electrical drain extension under the side gate. This channel creates a stepped potential distribution along the channel that it cannot be seen in the C-SOI MOSFETs. The voltage difference controls the channel properly and two-dimensional two-carrier device simulations revealed lower threshold voltage variations, larger breakdown voltage, higher voltage gain, lower hot carrier effects, improved drain-induced barrier lowering, lower drain conductance, higher unilateral power gain, and lower leakage current compared to a C-SOI device. Thus, our proposed structure has higher performance than a typical C-SOI structure.     

Optimal rate allocation in successively structured Gaussian CEO problem

We consider the Chief Executive Officer (CEO) problem in which agents encode their observations without collaborating with each other and send through rate constrained noiseless channels to a fusion center (FC).We apply the successive coding strategy into this problem and determine the closed-form expressions for optimal rates in order to achieve the minimum distortion under a sum-rate constraint. We show that the optimal sum-rate distortion performance for the Gaussian CEO problem is achievable using the successive coding strategy which is inherently a low complexity approach of obtaining a prescribed distortion. We also determine the optimal rate allocation region for the successively structured Gaussian CEO problem.     

An improved cluster formation process in wireless sensor network to decrease energy consumption

Wireless sensor network has special features and many applications, which have attracted attention of many scientists. High energy consumption of these networks, as a drawback, can be reduced by a hierarchical routing algorithm. The proposed algorithm is based on the Low Energy Adaptive Clustering Hierarchy (LEACH) and Quadrant Cluster based LEACH (Q-LEACH) protocols. To reduce energy consumption and provide a more appropriate coverage, the network was divided into several regions and clusters were formed within each region. In selecting the cluster head (CH) in each round, the amount of residual energy and the distance from the center of each node were calculated by the base station (including the location and residual energy of each node) for all living nodes in each region. In this regard, the node with the largest value had the highest priority to be selected as the CH in each network region. The base station calculates the CH due to the lack of energy constraints and is also responsible for informing it throughout the network, which reduces the load consumption and tasks of nodes in the network. The information transfer steps in this protocol are similar to the LEACH protocol stages. To better evaluate the results, the proposed method was implemented with LEACH LEACH-SWDN, and Q-LEACH protocols using MATLAB software. The results showed better performance of the proposed method in network lifetime, first node death time, and the last node death time.

     

A Convex Programming for Range Assignment to Optimize Lifetime in Network-Coding-Based-Wireless-Sensor Networks

Wireless sensor networks (WSNs) are known to be highly energy-constrained and  consequently lifetime is a critical metric in their design and implementation. Range assignment by adjusting the transmission powers of nodes create a energy-efficient topology for such networks while preserving other network issues, however, it may effect on the performance of other techniques such as network coding. This paper addresses the problem of lifetime optimization for WSNs where the network employs both range assignment and network-coding-based multicast. We formulate the problem and then reformulated it as convex optimization that offer a numerous theoretical or conceptual advantages. The proposed programming leads to efficient or distributed algorithms for solving the problem. Simulation results show that the proposed optimized mechanism decreases end-to-end delay and improve lifetime as compared by other conventional ones.     

An Anti-Gray Hole Attack Scheme in Mobile Ad Hoc Network

International Journal of Wireless Information Networks - Dynamic variation of network topology in mobile ad hoc networks (MANET) forces network nodes to work together and rely on each other for...     

Grid computing: a STOPE view

Grid computing is emerging as the foundation upon which virtual organizations can be built. Such organizations are becoming of increasing importance for tackling various projects, both in academic and in business fields. This paper is concerned with presenting an integrated view of the grid to readers interested in understanding it, or perhaps in developing it further or making use of it in the future. The target view is based on the STOPE (strategy/technology/organization/people/environment) framework that has previously been used to integrate the issues of various information technology problems over its well‐defined domains. For strategy, the view considers the reasons associated with the need for the grid, including grid services and grid benefits. For technology, the technical components of the grid and their functions are taken into account. For organization, the organizations concerned with the development, technology production, service provisioning and use of the grid are considered. For people, those associated with the grid in the related organizations are taken into account. For the environment, rules, practices and support associated with the grid are discussed. Finally, the paper emphasizes questions that need to be answered in order to contribute to the future development of the grid. Copyright © 2006 John Wiley & Sons, Ltd.     

Mobile Cloud Computing: A Survey,State of Art and Future Directions

In the recent years, cloud computing frameworks such as Amazon Web Services, Google AppEngine and Windows Azure have become increasingly popular among IT organizations and developers. Simultaneously, we have seen a phenomenal increase in the usage and deployment of smartphone platforms and applications worldwide. This paper discusses the current state of the art in the merger of these two popular technologies, that we refer to as Mobile Cloud Computing (MCC). We illustrate the applicability of MCC in various domains including mobile learning, commerce, health/wellness and social medias. We further identify research gaps covering critical aspects of how MCC can be realized and effectively utilized at scale. These include improved resource allocation in the MCC environment through efficient task distribution and offloading, security and privacy.     

All two-input logic gates by a single-stage single electron box

In this paper, the design of all two-input logic gates is presented by only a single-stage single electron box (SEB) for the first time. All gates are constructed based on a same circuit. We have used unique periodic characteristics of SEB to design these gates and present all two-input logic gates (monotonic/non-monotonic, symmetric/non-symmetric) by a single-stage design. In conventional monotonic devices, such as MOSFETs, implementing non-monotonic logic gates such as XOR and XNOR is impossible by only a single-stage design, and a multistage design is required which leads to more complexity, higher power consumption and less speed of the gates. We present qualitative design at first and then detailed designs are investigated and optimised by using our previous works. All designs are verified by a single electron simulator which shows correct operation of the gates.