Polymeric Multilayers that Contain Silver Nanoparticles can be Stamped onto Biological Tissues to Provide Antibacterial Activity

The design of polyelectrolyte multilayers (PEMs) that can be prefabricated on an elastomeric stamp and mechanically transferred onto biomedically‐relevant soft materials, including medical‐grade silicone elastomers (E’～450–1500 kPa; E’‐elastic modulus) and the dermis of cadaver skin (E’～200–600 kPa), is reported. Whereas initial attempts to stamp PEMs formed from poly(allylamine hydrochloride) and poly(acrylic acid) resulted in minimal transfer onto soft materials, we report that integration of micrometer‐sized beads into the PEMs (thicknesses of 6–160 nm) led to their quantitative transfer within 30 seconds of contact at a pressure of ～196 kPa. To demonstrate the utility of this approach, PEMs were impregnated with a range of loadings of silver‐nanoparticles and stamped onto the dermis of human cadaver skin (a wound‐simulant) that was subsequently incubated with bacterial cultures. Skin dermis stamped with PEMs that released 0.25 ± 0.01 μg cm^?2 of silver ions caused a 6 log₁₀ reduction in colony forming units of Staphylococcus epidermidis and Pseudomonas aeruginosa within 12 h. Significantly, this level of silver release is below that which is cytotoxic to NIH 3T3 mouse fibroblast cells. Overall, this study describes a general and facile approach for the functionalization of biomaterial surfaces without subjecting them to potentially deleterious processing conditions.     

Flexible,Mechanically Stable,Porous Self-Standing Microfiber Network Membranes of Covalent Organic Frameworks: Preparation Method and Characterization

Covalent organic frameworks (COFs) show advantageous characteristics, such as an ordered pore structure and a large surface area for gas storage and separation, energy storage, catalysis, and molecular separation. However, COFs usually exist as difficult-to-process powders, and preparing continuous, robust, flexible, foldable, and rollable COF membranes is still a challenge. Herein, such COF membranes with fiber morphology for the first time prepared via a newly introduced template-assisted framework process are reported. This method uses electrospun porous polymer membranes as a sacrificial large dimension template for making self-standing COF membranes. The porous COF fiber membranes, besides having high crystallinity, also show a large surface area (1153 m² g⁻¹), good mechanical stability, excellent thermal stability, and flexibility. This study opens up the possibility of preparation of large dimension COF membranes and their derivatives in a simple way and hence shows promise in technical applications in separation, catalysis, and energy in the future.     

Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies

Dual-V_t design technique has proven to be extremely effective in reducing subthreshold leakage in both active and standby mode of operation of a circuit in submicrometer technologies. However, aggressive scaling of technology results in different leakage components (subthreshold, gate and junction tunneling) to become significant portion of total power dissipation in CMOS circuits. High-V_t devices are expected to have high junction tunneling current (due to stronger halo doping) compared to low-V_t devices, which in the worst case can increase the total leakage in dual-V_t design. Moreover, process parameter variations (and in turn V_t variations) are expected to be significantly high in sub-50-nm technology regime, which can severely affect the yield. In this paper, we propose a device aware simultaneous sizing and dual-V_t design methodology that considers each component of leakage and the impact of process variation (on both delay and leakage power) to minimize the total leakage while ensuring a target yield. Our results show that conventional dual-V_t design can overestimate leakage savings by 36% while incurring 17% average yield loss in 50-nm predictive technology. The proposed scheme results in 10%-20% extra leakage power savings compared to conventional dual-V_t design, while ensuring target yield. This paper also shows that nonscalability of the present way of realizing high-V_t devices results in negligible power savings beyond 25-nm technology. Hence, different dual-V_t process options, such as metal gate work function engineering, are required to realize high-performance and low-leakage dual-V_t designs in future technologies.     

Assimilation of altimeter significant wave height into a third-generation global spectral wave model

Data from three different altimeters (Topex/Poseidon, Jason-1, and European Remote Sensing Satellite 2) have been assimilated in a third-generation global spectral wave model forced by winds observed by scatterometer onboard QuikSCAT. Two different approaches of assimilation have been discussed. In the first approach, a simple scaling has been used to generate wave spectrum from altimeter-derived significant wave heights for assimilation in the model. In the second approach, the influence of altimeter observation has been spread to nearby grid points. Assimilation has been carried out every 6 h for five days. After the expiry of the assimilation phase, the model has been run in pure hindcast mode. Assimilation experiments have been carried out for the months of September and December 2002. Impact of assimilation has been found to be quite high in the Indian Ocean. It has been also found that the model is able to retain the memory of assimilation for a period of two and a half days as far as global ocean is concerned. This memory is more for the Indian Ocean. The wave spectrum generated by the model in the hindcast mode has been validated against the buoy-observed wave spectrum in the high sea conditions. The more significant impact has been seen in the case of altimeter track in the vicinity of the buoy.     

Femtojoule-Power-Consuming Synaptic Memtransistor Based on Mott Transition of Multiphasic Vanadium Oxides

To realize the potential of Mott transition of multiphasic vanadium oxides (VO_x) for memory applications, the development of VO_x memtransistors on SiO₂ wafer is introduced. Through electrical characterizations, the volatile memory behaviors of the VO_x memtransistors are observed in both two- and three-terminal measurements. Their capacitive memory and resistive switching mechanisms are strongly related to the mixed VO_x/SiO₂ interface (called VSiO_x). VSiO_x supports the Mott transition in VO_x at low bias voltages (<0.5 V), leading to the low power consumption of the memtransistor. Moreover, the fast switching time (≈35 ns) and tunable memory retention with the synaptic functions (potentiation and depression) of the memtransistors (by using the gate and drain biases) are demonstrated. Overall, the findings open up major opportunities for constructing ultrafast and femto-joule power-consuming neuromorphic devices.     

Kitkaite NiTeSe,an Ambient-Stable Layered Dirac Semimetal with Low-Energy Type-II Fermions with Application Capabilities in Spintronics and Optoelectronics

The emergence of Dirac semimetals has stimulated growing attention, owing to the considerable technological potential arising from their peculiar exotic quantum transport related to their nontrivial topological states. Especially, materials showing type-II Dirac fermions afford novel device functionalities enabled by anisotropic optical and magnetotransport properties. Nevertheless, real technological implementation has remained elusive so far. Definitely, in most Dirac semimetals, the Dirac point lies deep below the Fermi level, limiting technological exploitation. Here, it is shown that kitkaite (NiTeSe) represents an ideal platform for type-II Dirac fermiology based on spin-resolved angle-resolved photoemission spectroscopy and density functional theory. Precisely, the existence of type-II bulk Dirac fermions is discovered in NiTeSe around the Fermi level and the presence of topological surface states with strong (≈50%) spin polarization. By means of surface-science experiments in near-ambient pressure conditions, chemical inertness towards ambient gases (oxygen and water) is also demonstrated. Correspondingly, NiTeSe-based devices without encapsulation afford long-term efficiency, as demonstrated by the direct implementation of a NiTeSe-based microwave receiver with a room-temperature photocurrent of 2.8 µA at 28 GHz and more than two orders of magnitude linear dynamic range. The findings are essential to bringing to fruition type-II Dirac fermions in photonics, spintronics, and optoelectronics.     

Tuning the Phase and Microstructural Properties of TiO<Subscript>2</Subscript> Films Through Pulsed Laser Deposition and Exploring Their Role as Buffer Layers for Conductive Films

Titanium oxide (TiO₂) is a semiconducting oxide of increasing interest due to its chemical and thermal stability and broad applicability. In this study, thin films of TiO₂ were deposited by pulsed laser deposition on sapphire and silicon substrates under various growth conditions, and characterized by x-ray diffraction (XRD), atomic force microscopy (AFM), optical absorption spectroscopy and Hall-effect measurements. XRD patterns revealed that a sapphire substrate is more suitable for the formation of the rutile phase in TiO₂, while a silicon substrate yields a pure anatase phase, even at high-temperature growth. AFM images showed that the rutile TiO₂ films grown at 805°C on a sapphire substrate have a smoother surface than anatase films grown at 620°C. Optical absorption spectra confirmed the band gap energy of 3.08 eV for the rutile phase and 3.29 eV for the anatase phase. All the deposited films exhibited the usual high resistivity of TiO₂; however, when employed as a buffer layer, anatase TiO₂ deposited on sapphire significantly improves the conductivity of indium gallium zinc oxide thin films. The study illustrates how to control the formation of TiO₂ phases and reveals another interesting application for TiO₂ as a buffer layer for transparent conducting oxides.     

Design of reliable universal QCA logic in the presence of cell deposition defect

The emergence of Quantum-dot Cellular Automata (QCA) has resulted in being identified as a promising alternative to the currently prevailing techniques of very large scale integration. QCA can provide low-power nanocircuit with high device density. Keeping aside the profound acceptance of QCA, the challenge that it is facing can be quoted as susceptibility to high error rate. The work produced in this article aims towards the design of a reliable universal logic gate (r-ULG) in QCA (r-ULG along with the single clock zone and r-ULG-II along with multiple clock zones). The design would include hybrid orientation of cells that would realise majority and minority, functions and high fault tolerance simultaneously. The characterisation of the defective behaviour of r-ULGs under different kinds of cell deposition defects is investigated. The outcomes of the investigation provide an indication that the proposed r-ULG provides a fault tolerance of 75% under single clock zone and a fault tolerance of 100% under dual clock zones. The high functional aspects of r-ULGs in the implementation of different logic functions successfully under cell deposition defects are affirmed by the experimental results. The high-level logic around the multiplexer is synthesised, which helps to extend the design capability to the higher-level circuit synthesis.     

Energy Efficient Broadcast in Wireless Ad hoc Networks with Hitch-hiking

In this paper, we propose a novel concept called Hitch-hiking in order to reduce the energy consumption of broadcast application for wireless networks. Hitch-hiking takes advantage of the physical layer design that facilitates the combining of partial signals to obtain the complete information. The concept of combining partial signals using maximal ratio combiner [15] has been used to improve the reliability of the communication link but has never been exploited to reduce energy consumption in broadcasting over wireless ad hoc networks. We study the advantage of Hitch-hiking for the scenario when the transmission power level of nodes is fixed as well as the scenario when the nodes can adjust their power level. For both scenarios, we show that Hitch-hiking is advantageous and have proposed algorithms to construct broadcast tree with Hitch-hiking taken into consideration. For fixed transmission power case, we propose and analyze a centralized heuristic algorithm called SPWMH (Single Power Wireless Multicast with Hitch-hiking) to construct a broadcast tree with minimum forwarding nodes. For the latter case, we propose a centralized heuristic algorithm called Wireless Multicast with Hitch-hiking (WMH) to construct an energy efficient tree using Hitch-hiking and also present a distributed version of the heuristic. We also evaluate the proposed heuristics through simulation. Simulation results show that Hitch-hiking can reduce the transmission cost of broadcast by as much as 50%. Further, we propose and evaluate a protocol called Power Saving with Broadcast Tree (PSBT) that reduces energy consumption of broadcast by eliminating redundancy in receive operation. Finally, we propose an algorithm that takes advantage of both Hitch-hiking and PSBT in conserving energy. Manish Agarwal is an engineer at Microsoft, Redmond. He received his Masters degree in Electrical and Computer Engineering from University of Massachusetts, Amherst in 2004. He received his undergraduate degree from Indian Institute of Technology, Guwahati. His research interest lies in the field of mobile ad hoc networks. Lixin Gao is an associate professor of Electrical and Computer Engineering at the University of Masschusetts, Amherst. She received her Ph.D. degree in computer science from the University of Massachusettes at Amherst in 1996. Her research interests include multimedia networking and Internet routing. Between May 1999 and January 2000, she was a visiting researcher at AT&T Research Labs and DIMACS. She is an Alfred P. Sloan Fellow and received an NSF CAREER Award in 1999. She is a member of IEEE, ACM, and Sigma Xi. Joon Ho Cho received the B.S. degree (summa cum laude) in electrical engineering from Seoul National University, Seoul, Korea, in 1995 and the M.S.E.E. and Ph.D. degrees in electrical and computer engineering from Purdue University, West Lafayette, IN, in 1997 and 2001, respectively. From 2001 to 2004, he was with the University of Massachusetts at Amherst as an Assistant Professor. Since July 2004, he has been with Pohang University of Science and Technology (POSTECH), Pohang, Korea, where he is presently an Assistant Professor in the Department of Electronic and Electrical Engineering. His research interests include wideband systems, multiuser communications, adaptive signal processing, packet radio networks, and information theory. Dr. Cho is currently an Associate Editor for the IEEE Transactions on Vehicular Technology. Jie Wu is a Professor at Department of Computer Science and Engineering, Florida Atlantic University. He has published over 300 papers in various journal and conference proceedings. His research interests are in the area of mobile computing, routing protocols, fault-tolerant computing, and interconnection networks. Dr. Wu served as a program vice chair for 2000 International Conference on Parallel Processing (ICPP) and a program vice chair for 2001 IEEE International Conference on Distributed Computing Systems (ICDCS). He is a program co-chair for the IEEE 1st International Conference on Mobile Ad-hoc and Sensor Systems (MASS'04). He was a co-guest-editor of a special issue in IEEE Computer on “Ad Hoc Networks”. He also editored several special issues in Journal of Parallel and Distributing Computing (JPDC) and IEEE Transactions on Parallel and Distributed Systems (TPDS). He is the author of the text “Distributed System Design” published by the CRC press. Currently, Dr. Wu serves as an Associate Editor in IEEE Transactions on Parallel and Distributed Systems and three other international journals. Dr. Wu is a recipient of the 1996–97 and 2001–2002 Researcher of the Year Award at Florida Atlantic University. He served as an IEEE Computer Society Distinguished Visitor. Dr. Wu is a Member of ACM and a Senior Member of IEEE.     

Reducing Encoder Bit-Rate Variation in MPEG Video

A shortcoming of current video transmission using the MPEG standard is that its encoder produces a variable bit rate (VBR). Due to this, the encoder output has to be buffered and released over the network at a constant rate. This buffering of the encoder output introduces an additional delay between the encoding and decoding phases of the video transmission. To remedy this problem, we present a strategy to distribute the load produced by the encoder as evenly as possible, i.e., try to have a constant bit rate (CBR). This is done by treating the slices in each frame separately while compressing them and then mixing the different kinds of slices that are sent over the network. The resulting load variation is much more uniform, reducing the buffering delay and making future bandwidth requirement estimates more accurate.This material is based upon work supported in part by the National Science Foundation under Award No. IRI-9526004, by the Texas Advanced Research Program under Grant No. 3652270, and by a grant from the University of Houston Institute of Space Systems Operations. Rajat Agarwal is now with Lucent Technologies. This paper is an extended version of a shorter paper presented at IEEE ICMCS 1999.Albert Mo Kim Cheng received the B.A. with Highest Honors in Computer Science at age 19, graduating Phi Beta Kappa, the M.S. in Computer Science with a minor in Electrical Engineering at age 21, and the Ph.D. in Computer Science at age 25, all from The University of Texas at Austin, where he held a GTE Foundation Doctoral Fellowship. Dr. Cheng is currently a tenured Associate Professor in the Department of Computer Science at the University of Houston, where he is the founding Director of the Real-Time Systems Laboratory. He has served as a technical consultant for several organizations, including IBM, and was also a visiting faculty in the Departments of Computer Science at Rice University (2000) and at the City University of Hong Kong (1995).He is the author/co-author of over seventy refereed publications in IEEE Transactions on Software Engineering, IEEE Transactions on Knowledge and Data Engineering, Real-Time Systems Symposium, Real-Time and Embedded Technology and Applications Symposium, and other leading conferences. One of his recent work presents a timing analysis of the NASA X-38 Space Station Crew Return Vehicle Avionics, which contains a fault-tolerant distributed system.Dr. Cheng has received numerous awards, including the National Science Foundation Research Initiation Award (now known as the NSF CAREER award). He has been invited to present seminars and tutorials at over 30 conferences, and has given invited seminars/keynotes at over 20 universities and organizations, most recently at ICEIS, Ecole Superieure de l Ouest (ESEO), Angers, France, April 2003. His next invited keynote speech will be at the 1st Intl. Conf. on Informatics in Control, Automation and Robotics (ICINCO), Setubal, Portugal, August 2004.He is an Associate Editor of the IEEE Transactions on Software Engineering (1998-2003), a Guest Co-Editor of two IEEE TSE Special Issues on Software and Performance (Nov. and Dec. 2000), an Associate Editor of the International Journal of Computer and Information Science, the work-in-progress program chair of the 2001 IEEE-CS Real-Time Technology and Applications Symposium, the work-in-progress session chair of the 2003 IEEE-CS Real-Time Systems Symposium, and the invited special panel chair for the software engineering for multimedia session at the 1999 IEEE-CS International Conference on Multimedia Computing Systems (ICMCS). Currently, he is a member of the program committees of RTSS, RTAS, ICEIS, ICECCS, RTAS, LCN, COMPSAC, ICCCN, AIA, DBA, PDCN, SE, and ICINCO. Dr. Cheng is an Honorary Member of the Institute for Systems and Technologies of Information, Control and Communication (INSTICC). He is a Senior Member of the IEEE.Dr. Cheng is the author of several book chapters on E-commerce/Enterprise Information Systems, and an article entitled Embedded OS, in the upcoming Encyclopedia of Computer Science and Engineering (John Wiley & Sons). He is the author of the new senior/graduate-level textbook entitled Real-Time Systems: Scheduling, Analysis, and Verification (John Wiley & Sons). cheng@cs.uh.eduRajat Agarwal received the M.S. in Computer Science from the University of Houston. He is currently a Member of the Technical Staff at Lucent Technologies. His research interest is in real-time multimedia systems.