A unique method for reducing losses of bends in dielectric optical wave guide

The dielectric optical wave guide is finding growing attention at millimeter wave frequencies. However the dielectric optical waveguide radiates at bends and thus transmission loss increases. These radiations are in the outword direction of bends. This output radiation at output bends arises due to change in phase velocities of the propagating wave at the centre of the dielectric guide and the phase velocity at the outer surface of the dielectric guide. A unique methiod is suggested to avoid these radiation losses.Experimental results are also shown at microwave frequencies.     

Variation of wave impedance of shielded suspended dielectric guide

A shielded suspended dielectric guide is a dielectric rectangular slab enclosed by regular metallic side walls from all the sides. This type of structure is used in dual mode phase shifter where the size of the normal rectangular wave guide is reduced at the ends, where a dielectric material is embeded in ferrite core. Hence impedance variation of a phase shifter at its transition may be easily calculated using shielded suspended dielectric guide which is a prime parameter for optimum efficiency of wave launching.     

Development of CdS based stable thin film photo electrochemical solar cells

CdS semiconductor films have been prepared from chemical bath deposition from basic solutions. Electron microscopic studies have revealed the presence of polycrystalline mixed cubic and hexagonal phases of CdS in the deposits. When surface treated, these layers show good photo electro chemical behaviour in Ti/CdS/S/C cell configuration where as photo etching improves the stability of CdS photo anode in polysulphide electrolyte to a great extent. Optical absorption studies of these films have been carried out in the wavelength range 350–800 nm.     

Atomically Thin MoS2: A Versatile Nongraphene 2D Material

Two‐dimensional inorganic materials are emerging as a premiere class of materials for fabricating modern electronic devices. The interest in 2D layered transition metal dichalcogenides is especially high. Particularly, 2D MoS₂ is being heavily researched due to its novel functionalities and its suitability for a wide range of electronic and optoelectronic applications. In this article, the progress in mono/few layer(s) MoS₂ research is reviewed by focusing primarily on the layer dependent evolution of crystal, phonon, and electronic structure. The review includes extensive detail into the methodologies adapted for single or few layer(s) MoS₂ growth. Further, the review covers the versatility of 2D MoS₂ for a broad range of device applications. Recent advancements in the field of van der Waals heterostructures are also highlighted at the end of the review.     

A novel compact circuit for 4-PAM energy-efficient high speed interconnect data transmission and reception

Transmission of signals, whether on-chip or off-chip, places severe constraints on timing and extracts a large price in energy. New silicon device technologies, such as back-plane CMOS, provide a programmable and adaptable threshold voltage as an additional tool that can be used for low power design. We show that one particularly desirable use of this freedom is energy-efficient high-speed transmission across long interconnects using multi-valued encoding. Our multi-valued CMOS circuits take advantage of the threshold voltage control of the transistors, by using the signal-voltage-to-threshold-voltage span, in order to make area-efficient implementations of 4-PAM (pulse amplitude modulation) transceivers operating at high speed. In a comparison of a variety of published technologies, for signal transmission with interconnects of 10-15 mm length, we show up to 50% improvement in energy for on-chip signal transmission over binary encoding together with higher limits for operating speeds without a penalty in circuit noise margin.     

CdTe/CdS thin film solar cells grown in substrate configuration

The ability to grow efficient CdTe/CdS solar cells in substrate configuration would not only allow for the use of non‐transparent and flexible substrates but also enable a better control of junction formation. Yet, the problems of barrier formation at the back contact as well as the formation of a p–n junction with reduced recombination losses have to be solved. In this work, CdTe/CdS solar cells in substrate configuration were developed, and the results on different combinations of back contact materials are presented. The Cu content in the electrical back contact was found to be a crucial parameter for the optimal CdCl₂‐treatment procedure. For Cu‐free cells, two activation treatments were applied, whereas Cu‐containing cells were only treated once after the CdTe deposition. A recrystallization behavior of the CdTe layer upon its activation similar to superstrate configuration was found; however, no CdTe–CdS intermixing could be observed when the layers were treated consecutively. Remarkably high V_OC and fill factor of 768 mV and 68.6%, respectively, were achieved using a combination of MoO₃, Te, and Cu as back contact buffer layer resulting in 11.3% conversion efficiency. With a Cu‐free MoO₃/Te buffer material, a V_OC of 733 mV, a fill factor of 62.3%, and an efficiency of 10.0% were obtained. Copyright © 2012 John Wiley & Sons, Ltd.     

Analysis and design of optimum interleaver for iterative receivers in IDMA scheme

In this paper, we propose a new tree based interleaver (TBI) to generate different chip‐level interleaving sequences for different users in an interleave division multiple access (IDMA) system, which reduces computational complexity. This method of generation also solves the memory cost problem and reduces the amount of information exchange between mobile stations (MSs) and base stations (BSs) required to specify the interleaver. Simulation results are presented to show that the proposed interleavers perform well as compared to random interleavers in an IDMA system. Copyright © 2008 John Wiley & Sons, Ltd.     

Nework topology for maximizing the terminal reliability in a Computer Communication Network

In the design of a Computer Communication Network (CCN), the reliability between any pair of nodes and the maximum permissible installation cost are of great importance. These characteristics are largely dependant upon the topological layout of the links, their costs and reliabilities. Having the knowledge of the topological layout of the various computer centres (nodes) and maximum permissible cost of installing the various links at their pre-assigned positions; in this paper an algorithm for obtaining an optimal network topology which gives the maximum s?t reliability is presented. The developed method is general and is computerized. The proposed method has an additional advantage that the system is not to be redesigned, if at a later stage the permissible cost is enhanced by budgetary provisions. An example illustrates the algorithm.     

A class of efficient tests for increasing-failure-rate-averagedistribution under random censoring

A class of tests for the increasing failure rate average (IFRA) alternatives under random censoring is proposed. The tests are based on a function of the Kaplan-Meier estimator. Most of the IFRA tests in the literature depend on the (nuisance) parameter that appears in the definition of IFRA, and the choice of this parameter is crucial in performing the tests. The proposed class of tests does not have this disadvantage. Under some regularity conditions, the asymptotic normality of the tests is established and asymptotically distribution-free tests are obtained by using estimators for the null standard deviations. The efficacies of the tests under the proportional hazard censoring model are studied. The proposed test is most efficient for the Weibull family of IFRA alternatives among the existing tests available for the censored data. The test is applied to published appliance data