A multi-agent decision support system for stock trading

A distributed problem solving system can be characterized as a group of individual cooperating agents running to solve common problems. As dynamic application domains continue to grow in scale and complexity, it becomes more difficult to control the purposeful behavior of agents, especially when unexpected events may occur. This article presents an information and knowledge exchange framework to support distributed problem solving. From the application viewpoint the article concentrates on the stock trading domain; however, many presented solutions can be extended to other dynamic domains. It addresses two important issues: how individual agents should be interconnected so that their resources are efficiently used and their goals accomplished effectively; and how information and knowledge transfer should take place among the agents to allow them to respond successfully to user requests and unexpected external situations. The article introduces an architecture, the MASST system architecture, which supports dynamic information and knowledge exchange among the cooperating agents. The architecture uses a dynamic blackboard as an interagent communication paradigm to facilitate factual data, business rule, and command exchange between cooperating MASST agents. The critical components of the MASST architecture have been implemented and tested in the stock trading domain, and have proven to be a viable solution for distributed problem solving based on cooperating agents     

Mixed Mode VLSI Implementation of a Neural Associative Memory

A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. To keep the memory density as high as possible two design strategies are considered. First, the number of transistors per storage element is kept to a minimum. In this paper a circuit technique that uses a single 6-transistor cell for weight storage and analog signal processing is proposed. Second, the device precision has been chosen to a moderate level to save area as much as possible. Since device mismatch limits the performance of analog circuits, the impact of device precision on the circuit performance is explicitly discussed. It is shown that the device precision limits the number of rows activated in parallel. Since the input vector as well as the output vector are considered to be sparsely coded it is concluded, that even for large matrices the proposed circuit technique is appropriate and ultra large scale integration with a large number of connection weights is feasible.     

New bounds for the Marcum Q-function

New bounds are proposed for the Marcum Q-function, which is defined by an integral expression where the 0th-order modified Bessel function appears. The proposed bounds are derived by suitable approximations of the 0th-order modified Bessel function in the integration region of the Marcum Q-function. They prove to be very tight and outperform bounds previously proposed in the literature. In particular, the proposed bounds are noticeably good for large values of the parameters of the Marcum Q-function, where previously introduced bounds fail and where exact computation of the function becomes critical due to numerical problems     

Universal Rendering Sequences for Transparent Vertex Caching of Progressive Meshes

We present methods to generate rendering sequences for triangle meshes which preserve mesh locality as much as possible. This is useful for maximizing vertex reuse when rendering the mesh using a FIFO vertex buffer, such as those available in modern 3D graphics hardware. The sequences are universal in the sense that they perform well for all sizes of vertex buffers, and generalize to progressive meshes. This has been verified experimentally.     

A new hybrid active power filter (APF) topology

In this paper, a new hybrid active power filter topology is presented. A higher-voltage, low-switching frequency insulated gate bipolar transistor (IGBT) inverter and a lower-voltage high-switching frequency metal oxide semiconductor field effect transistor (MOSFET) inverter are used in combination to achieve harmonic current compensation. The function of the IGBT inverter is to support utility fundamental voltage and to compensate for the fundamental reactive power. The MOSFET inverter fulfills the function of harmonic current compensation. To further reduce cost and to simplify control, the IGBT and MOSFET inverters share the same DC-link via a split capacitor bank. With this approach harmonics can be cancelled over a wide frequency range. Compared to the conventional APF topology, the proposed approach employs lower dc-link voltage and generates less noise. Simulation and experimental results show that the proposed active power filter topology is capable of compensating for the load harmonics     

Characterization method of thermomechanical parameters for microelectronic materials

Reliability of thermomechanical simulations is critically linked to the accuracy of the mechanical properties that govern the behaviour of structure, like Young's modulus (E) and coefficient of thermal expansion (CTE). For many cases, the values found in literatures are dealing with bulk properties without detailed information on temperature effects. To address such issues, it is necessary to measure the materials parameters as a function of temperature. The measurement of CTE is usually accomplished by evaluating the thermal deflections of a subjected material layer deposited on a substrate, providing that E is known at a specific temperature of experiment. A bilayer method, based on theory of elasticity, is proposed to determine both E and CTE for a given temperature with a good resolution. This paper presents the theoretical analysis, the design and process of the microsystem test structures, and the main calculation results.     

An improved Gaussian approximation for probability of bit-erroranalysis of asynchronous bandlimited DS-CDMA systems with BPSK spreading

This paper analyzes probability of bit-error (P_e) performance of asynchronous bandlimited direct-sequence code-division multiple-access systems with binary phase-shift keying spreading. The two present methods of P_e analysis under bandwidth-efficient pulse shaping: the often-cited standard Gaussian approximation and the characteristic function (CF) method suffer from either a low accuracy in regions of low P_e (< 10^-3) or a prohibitively large computational complexity. The paper presents an alternate method of P_e analysis with moderate computational complexity and high accuracy based on a key observation. A sequence of chip decision statistics (whose sum yields a bit statistic) forms a stationary, m-dependent sequence when conditioned on the chip delay and phase offset of each interfering signal. This observation permits the generalization of the improved Gaussian approximation previously derived for the rectangular pulse and the derivation of a numerically efficient approximation based on the CF method. Numerical examples of systems using the square-root raised-cosine and IS-95 pulses illustrate THE P _e performance, user capacity and the accuracy of the proposed method     

Measurements of single chain form factors by small-angle neutron scattering from polystyrene blends containing high concentrations of labelled molecules

A series of small angle neutron scattering measurements on blends of normal polystyrene (PSH) and labelled (deuterated) polystyrene (PSD) have been made with concentrations of PSD from 5 to 50 mol %. It is shown that the single chain form factor of the polymer in bulk can be obtained from a single concentration measurement for any concentration of labelled molecules, providing the molecular weights of the parent and labelled molecules are the same and the molecular weight distributions are narrow.