Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays

This paper presents results of using a Coarse Grain Reconfigurable Architecture called DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in order and degree of parallelism using radix-2 decimation in time (DIT). The DRRA fabric is extended with memory architecture to be able to deal with data-sets much larger than what can be accommodated in the register files of DRRA. The proposed implementation scheme is generic in terms of the number of FFT point, the size of memory and the size of register file in DRRA. Two implementations (DRRA-1 and DRRA-2) have been synthesized in 65 nm technology and energy/delay numbers measured with post-layout annotated gate level simulations. The results are compared to other Coarse Grain Reconfigurable Architectures (CGRAs), and dedicated FFT processors for 1024 and 2048 point FFT. For 1024 point FFT, in terms of FFT operations per unit energy, DRRA-1 and DRRA-2 outperforms all CGRA by at least 2× and is worse than ASIC by 3.45×. However, in terms of energy-delay product DRRA-2 outperforms CGRAs by at least 1.66× and dedicated FFT processors by at least 10.9×. For 2048-point FFT, DRRA-1 and DRRA-2 are 10× better for energy efficiency and 94.84 better for energy-delay product. However, radix-2 implementation is worse by 9.64× and 255× in terms of energy efficiency and energy-delay product when compared against a radix-2⁴ implementation.

     

Best Minimum Summation Scheduler for Long Term Evolution

Resource scheduling in Long Term Evolution (LTE) is an open and rising issue. It has an enormous impact on the entire system performance. Due to the nature of LTE system, the scheduler has to be designed carefully. It has to overcome many challenges such as limited processing time and the high dynamic behavior. This paper proposes a novel scheduling policy for the MAC layer in LTE called the Best Minimum Summation (BMS). The main aim of this scheduling policy is to achieve high performance with low complexity. Three sub-schedulers have been developed. Each one of these schedulers deals with scheduling table in different dimension. The first one operates on the scheduling table through the user dimension (BMS.UE); while the second one operates on the scheduling table through the resource block dimension (BMS.RB). The third scheduler operates on the scheduling table correlating both of these dimensions (BMS.2D). All of the proposed solutions were intensively evaluated in a system level simulator. Three performance metrics were used which are throughput, error rate and fairness. The results have shown that the ability of the BMS.UE scheduler to outperform other existing schedulers of LTE.     

New Wide Band Low Power CMOS Current Conveyors

New Class-A second-generation CMOS current conveyor (CCII) suitable for high frequency applications is proposed. It provides low input impedance and accurate voltage and current tracking. Targeting low power dissipation, the Class-AB version of the proposed Class-A architecture is introduced as well. Simulation results are included.     

Secondary side post regulator for improving cross regulation and reducing standby power consumption

The quest for improved energy savings is driving research into power converter high-efficiency operation under extremely light-load conditions. The use of multiple output converters to satisfy circuit needs and cost requirements adds additional complication to the standby mode power-consumption problem. This is due to the difficulty of satisfying both good cross-regulation under various load conditions as well as high efficiency in the standby mode simultaneously; because topologies that exhibit a good cross-regulation performance, such as resonant converters, generally have a poor efficiency problem under extremely light-loads. A secondary side post regulator (SSPR) is proposed to reduce the standby power consumption and to improve the cross-regulation performance of single- controller multiple-output channel power converters. It is capable of reducing the power consumption of the power converter as well as the SSPR. The SSPR is analysed using its operational principles and small signal models. A 110?W experimental prototype was built to verify the standby power consumption and cross-regulation performance using the proposed SSPR.     

A Threshold-Free LLR-Based Scheme to Minimize the BER for Decode-and-Forward Relaying

In cooperative communications, the problem of error propagation has a detrimental effect on the diversity order of the wireless system. To mitigate such an effect, we present a relaying scheme that is based on the absolute value of the log-likelihood ratio (LLR) of the received message signals at both the relay node and the destination node. The calculated LLR values are then compared to each other and based on the result of the comparison, a decision is made on whether or not to activate the relay node. The proposed scheme does not rely on any threshold, and is thus simple in nature. A closed-form expression is derived for the bit-error-rate (BER) of the proposed scheme. The theoretical developments are validated by simulations. As a means for performance measurement, the proposed scheme is compared to its counterparts and is shown to provide a better BER performance at a much lower complexity. Furthermore, a closed-form expression of the outage probability is also derived.     

A Novel Constellation Shaping Technique for Bit-Interleaved Coded Modulation

We present a new and simple method which consists to apply constellation shaping to bit-interleaved turbo-coded modulation (BICTM) over additive white Gaussian noise channels. By assuming the example of a 3-bit/dim 16-PAM BITCM, it is shown that this technique can provide shaping gain of 0.79 dB.     

WCDMA Multiclass Downlink Capacity and Interference Statistics of Cigar-Shaped Microcells in Highways

In this paper, the multiclass downlink capacity and the interference statistics of the sectors of a cigar-shaped microcells using wideband code-division multiple-access with soft handover mode are analyzed. The two-slope propagation model with log-normal shadowing is used in the analysis where a model of 8 cigar-shaped microcells is utilized. The performance of the downlink is studied for different [sector range R, standard deviation of the shadowing ( $\sigma _{1}$ and $\sigma _{2})$ and propagation exponents ( $\text{ s}_{1}$ and $\text{ s}_{2})$ ]. It is found that increasing the sector range from 500 to 1,000 m will increase the sector downlink capacity. Also, it is found that increasing the value of the propagation parameters ( $\sigma _{1}$ and $\sigma _{2})$ will reduce the downlink sector capacity. It is noticed that, the effect of changing the propagation exponent $\text{ s}_{1}$ is null while increasing the propagation exponent $\text{ s}_{2}$ will increase the downlink capacity.     

Impact of Offloading on the Efficiency of Wireless Access Networks

International Journal of Wireless Information Networks - Wireless access networks need to deliver a satisfactory level of Quality of Service (QoS) to their subscribers. The service quality can be...     

Potential interference and rain attenuation at 21.4–22 GHz downlink broadcasting satellite signals

World Radio Conference WRC-1992 has allocated the frequency band 21.4–22.0?GHz to regions 1 and 3 to be utilised to carry direct broadcasting satellite (DBS) services. This high-frequency band is more susceptible to rain attenuation, leading to degradation of the signal quality. Moreover, this frequency band is assigned to two different services, i.e. satellite broadcasting and fixed mobile services at the same regions; hence, the impact of intersystem interference in a depredated signal is a critical issue in the DBS receiver. In this study, the effects of rain attenuation on the DBS downlink signals as well as the impact of the potential interference on the reception quality will be estimated. An interference scenario will be introduced to investigate the system performance in both propagation mechanisms of clear-sky and rain conditions.     

Approximated Fractional-Order Inverse Chebyshev Lowpass Filters

In this paper we use a least-squares fitting routine to approximate the stopband ripple characteristics of fractional-order inverse Chebyshev lowpass filters which have fractional-order zeros and poles. MATLAB simulations of \((1+\alpha )\)-order lowpass filters with fractional steps from \(\alpha =0.1\) to \(\alpha =0.9\) are given as examples. SPICE simulations of 1.2-, 1.5-, and 1.8-order lowpass filters and experimental results of a 1.5-order filter using approximated fractional-order capacitors in a Multiple-Input Biquad circuit validate the implementation of these circuits.