Wireless Brain Computer Interface for Smart Home and Medical System

Wireless Personal Communications - The number of aged and disabled people has been increasing worldwide. To look after these people is a big challenge in this era. However, scientists overcome the...     

Interconnect limits on gigascale integration (GSI) in the 21stcentury

Twenty-first century opportunities for GSI will be governed in part by a hierarchy of physical limits on interconnects whose levels are codified as fundamental, material, device, circuit, and system. Fundamental limits are derived from the basic axioms of electromagnetic, communication, and thermodynamic theories, which immutably restrict interconnect performance, energy dissipation, and noise reduction. At the material level, the conductor resistivity increases substantially in sub-50-nm technology due to scattering mechanisms that are controlled by quantum mechanical phenomena and structural/morphological effects. At the device and circuit level, interconnect scaling significantly increases interconnect crosstalk and latency. Reverse scaling of global interconnects causes inductance to influence on-chip interconnect transients such that even with ideal return paths, mutual inductance increases crosstalk by up to 60% over that predicted by conventional RC models. At the system level, the number of metal levels explodes for highly connected 2-D logic megacells that double in size every two years such that by 2014 the number is significantly larger than ITRS projections. This result emphasizes that changes in design, technology, and architecture are needed to cope with the onslaught of wiring demands. One potential solution is 3-D integration of transistors, which is expected to significantly improve interconnect performance. Increasing the number of active layers, including the use of separate layers for repeaters, and optimizing the wiring network, yields an improvement in interconnect performance of up to 145% at the 50-nm node     

A 2.4-GHz CMOS transceiver for Bluetooth

A fully integrated CMOS transceiver tuned to 2.4 GHz consumes 46 mA in receive mode and 47 mA in transmit mode from a 2.7-V supply. It includes all the receive and transmit building blocks, such as frequency synthesizer, voltage-controlled oscillator (VCO), power amplifier, and demodulator. The receiver uses a low-IF architecture for higher level of integration and lower power consumption. It achieves a sensitivity of -82 dBm at 0.1% BER, and a third-order input intercept point (IIP3) of -7 dBm. The direct-conversion transmitter delivers a GFSK modulated spectrum at a nominal output power of 4 dBm. The on-chip voltage controlled oscillator has a close-in phase-noise of -120 dBc/Hz at 3-MHz offset     

基于空间谱的多天线盲频谱感知算法

现有的频谱感知算法主要在时间、频率以及地理空间维度进行检测,对角度维的利用尚不成熟。将多天线技术中的到达角（AOA, angle of arrival）估计算法应用到频谱感知领域,提出了2种基于空间谱的盲频谱感知算法,分别为最大—最小延迟相加谱值比检测和平均—最小延迟相加谱值比检测。利用空域匹配滤波的优势,新算法在低信噪比下得到了较高的检测概率,同时为角度维的频谱接入提供了AOA信息,从而提高了频谱利用率。此外,运用随机矩阵理论,推导了检测阈值和检测概率的理论值。仿真结果表明,在Nakagami-m信道下,提出的算法具有比现有盲感知算法更优的检测性能。     

Coexistence of OFDM‐Based IMT‐Advanced and FM Broadcasting Systems

Coexistence analysis is extremely important in examining the possibility for spectrum sharing between orthogonal frequency‐division multiplexing (OFDM)‐based international mobile telecommunications (IMT)‐Advanced and other wireless services. In this letter, a new closed form method is derived based on power spectral density analysis in order to analyze the coexistence of OFDM‐based IMT‐Advanced systems and broadcasting frequency modulation (FM) systems. The proposed method evaluates more exact interference power of IMT‐Advanced systems in FM broadcasting systems than the advanced minimum coupling loss (A‐MCL) method. Numerical results show that the interference power is 1.3 dB and 3 dB less than that obtained using the A‐MCL method at cochannel and adjacent channel, respectively. This reduces the minimum separation distance between the two systems, which eventually saves spectrum resources.     

A modified rain attenuation prediction model for tropical V‐band satellite earth link

Radio wave propagation plays a very important part in the design and eventually dictates performance of space communication systems. Over time, the requirements of satellite communication have grown extensively where higher capacity communications systems are needed. Escalating demands of microwave and millimetre wave communications are causing frequency spectrum congestion. Hence, existing and future satellite system operators are planning to employ frequency bands well above 10 GHz. The challenge in operating at such high frequencies for communication purposes is that there exists stronger electromagnetic interaction between the radio signals and atmospheric hydrometeors. Such instances will degrade the performance of such high frequency satellite communication systems. The development of a revised model for a better‐improved rain fade prediction of signal propagations in tropical region is considered very important. Researchers and engineers can employ the model to accurately plan the future high frequencies satellite services. Copyright © 2014 John Wiley & Sons, Ltd.     

Fuzzy logic control of FES rowing exercise in paraplegia

An indoor personal rowing machine (Concept 2 Inc., Morrisville, VT) has been modified for functional electrical stimulation assisted rowing exercise in paraplegia. To successfully perform the rowing maneuver, the voluntarily controlled upper body movements must be coordinated with the movements of the electrically stimulated paralyzed legs. To achieve such coordination, an automatic controller was developed that employs two levels of hierarchy. A high level finite state controller identifies the state or phase of the rowing motion and activates a low-level state-dedicated fuzzy logic controller (FLC) to deliver the electrical stimulation to the paralyzed leg muscles. A pilot study with participation of two paraplegic volunteers showed that FLC spent less muscle energy, and produced smoother rowing maneuvers than the existing On-Off constant-level stimulation controller.     

Proposal for st-Routing Protocol

A routing protocol chooses one of the several paths (routes) from a source node to a destination node in the computer network, to send a packet of information. In this paper, we propose a new routing protocol, which we call st-routing protocol, based on st-numbering of a graph. The protocol fits well in noisy environments where robustness of routing using alternative paths is a major issue. The proposed routing protocol provides a systematic way to retry alternative paths without generating any duplicate packets. The protocol works for only those networks that can be represented by biconnected graphs.     

Empirically Verified Thermodynamic Model of Gate Capacitance and Threshold Voltage of Nanoelectronic MOS Devices With Applications to HfO2 and ZrO2 Gate Insulators

A thermodynamic variational model derived by minimizing the Helmholtz free energy of the MOS device is presented. The model incorporates an anisotropic permittivity tensor and accommodates a correction for quantum-mechanical charge confinement at the dielectric/substrate interface. The energy associated with the fringe field that is adjacent to the oxide is of critical importance in the behavior of small devices. This feature is explicitly included in our model. The model is verified using empirical and technology-computer-aided-design-generated capacitance-voltage data obtained on MOS devices with ZrO₂, HfO₂, and SiO₂ gate insulators. The model includes considerations for an interfacial low-k interface layer between the silicon substrate and the high-k dielectric. This consideration enables the estimation of the equivalent oxide thickness. The significance of sidewall capacitance effects is apparent in our modeling of the threshold voltage (V_th) for MOS capacitors with effective channel length at 30 nm and below. In these devices, a variation in high-k permittivity produces large differences in V_th. This effect is also observed in the variance of V_th, due to dopant fluctuation under the gate.     

Layout-Specific Circuit Evaluation in 3-D Integrated Circuits

In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit are fabricated on different wafers, and then, the wafers are bonded with a glue layer of Cu or polymer based adhesive. Using our layout methodology, designers can layout such 3D circuits with necessary information on inter-wafer via/contact and orientation of each wafer embedded in the layout. We have implemented the layout methodology in 3DMagic. Availability of 3DMagic has led to interesting research with a wide range of layout-specific circuit evaluation, from performance comparison of 2D and 3D circuits to layout-specific reliability analyses in 3D circuits. Using 3DMagic, researchers have designed and simulated an 8-bit encryption processor mapped into 2D and 3D FPGA layouts. Moreover, the layout methodology is an essential element of our ongoing research for the framework of a novel Reliability Computer Aided Design tool, ERNI-3D.