Evolutionary concepts in the functional biotics arena: a mini-review

Over the years, the attempts to elucidate the role of beneficial microorganisms in shaping human health are becoming fairly apparent. The functional impact conferred by such microbes is not only transmitted by viable cells or their metabolites but also through non-viable cells. Extensive research to unveil the protective action of such wonder bugs has resulted in categorizing the beneficial microflora and their bioactive metabolites into a variety of functional biotic concepts based on their intended applications in various forms. In the modern era, these are often termed as probiotics, prebiotics, synbiotics, postbiotics, next-generation probiotics, psychobiotics, oncobiotics, pharmabiotics, and metabiotics. Currently, the concept of traditional probiotics is being widened to include microbes beyond lactic acid bacteria. Indeed, this diversification has broadened the functional food portfolio from food to pharmaceuticals. In this context, the present review aims to summarize the existing biotic concepts and their differences thereof.     

Engineering the system of communication for safer surgery

Communication failures are a leading cause of error in surgery. Researchers and practitioners have therefore developed different interventions to improve communications, such as team briefing and pre-operative patient checklists. These different methods have clear merit. However, they have only dealt with portions of a complex system. Consequently, disparate interventions of varying kinds may not integrate and build an effective system of communication. We argue that a new view of communication is needed to improve safety in surgery; the view that communication is more fundamentally as a property of the whole system of work rather than confined to interpersonal exchanges. Rather than simply add an intervention to the system, interventions should integrate into the system. To achieve this, we propose a practical strategy to re-engineer the system of communication for surgery. This demands an analysis of the immediate informational needs within the system of interest, and an account of the wider system and those ergonomic and human factors shaping the performance of communicators. We illustrate the application of the method and refer to potential improvements in safety.     

An efficient neural-network model for real-time fault detection in industrial machine

Neural Computing and Applications - Induction machines have extensive demand in industries as they are used for large-scale production and, therefore, vulnerable to both electrical and mechanical...     

Compiler-assisted energy optimization for clustered VLIW processors

Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by improving the clock speed, reducing the energy consumption of the logic, and making the design simpler, it introduces extra overheads by way of inter-cluster communication. This communication happens over long global wires having high load capacitance which leads to delay in execution and significantly high energy consumption. Inter-cluster communication also introduces many short idle cycles, thereby significantly increasing the overall leakage energy consumption in the functional units. The trend towards miniaturization of devices (and associated reduction in threshold voltage) makes energy consumption in interconnects and functional units even worse, and limits the usability of clustered architectures in smaller technologies. However, technological advancements now permit the design of interconnects and functional units with varying performance and power modes. In this paper, we propose scheduling algorithms that aggregate the scheduling slack of instructions and communication slack of data values to exploit the low-power modes of functional units and interconnects. Finally, we present a synergistic combination of these algorithms that simultaneously saves energy in functional units and interconnects to improves the usability of clustered architectures by achieving better overall energy–performance trade-offs. Even with conservative estimates of the contribution of the functional units and interconnects to the overall processor energy consumption, the proposed combined scheme obtains on average 8% and 10% improvement in overall energy–delay product with 3.5% and 2% performance degradation for a 2-clustered and a 4-clustered machine, respectively. We present a detailed experimental evaluation of the proposed schemes. Our test bed uses the Trimaran compiler infrastructure.     

Filtering and smoothing in an H∞ setting

The problems of filtering and smoothing are considered for linear systems in an H^∞ setting, i.e. the plant and measurement noises have bounded energies (are in L₂), but are otherwise arbitrary. Two distinct situations for the initial condition of the system are considered; the initial condition is assumed known in one case, while in the other the initial condition is not known but the initial condition, the plant, and measurement noise are in some weighted ball of RⁿXL₂. Finite-horizon and infinite-horizon cases are considered. Necessary and sufficient conditions are presented for the existence of estimators (both filters and smoothers) that achieve a prescribed performance bound, and algorithms that result in performance within the bounds are developed. In case of smoothers, the optimal smoother is also presented. The approach uses basic quadratic optimization theory in a time-domain setting, as a consequence of which both linear time-varying and time-invariant systems can be considered with equal ease. (In the smoothing problem, for linear time-varying systems, one considers only the finite-horizon case)     

Compiler-assisted power optimization for clustered VLIW architectures

Clustered VLIW architectures solve the scalability problem associated with flat VLIW architectures by partitioning the register file and connecting only a subset of the functional units to a register file. However, inter-cluster communication in clustered architectures leads to increased leakage in functional components and a high number of register accesses. In this paper, we propose compiler scheduling algorithms targeting two previously ignored power-hungry components in clustered VLIW architectures, viz., instruction decoder and register file.We consider a split decoder design and propose a new energy-aware instruction scheduling algorithm that provides 14.5% and 17.3% benefit in the decoder power consumption on an average over a purely hardware based scheme in the context of 2-clustered and 4-clustered VLIW machines. In the case of register files, we propose two new scheduling algorithms that exploit limited register snooping capability to reduce extra register file accesses. The proposed algorithms reduce register file power consumption on an average by 6.85% and 11.90% (10.39% and 17.78%), respectively, along with performance improvement of 4.81% and 5.34% (9.39% and 11.16%) over a traditional greedy algorithm for 2-clustered (4-clustered) VLIW machine.     

Linearized reduced-order filtering

A reduced-order version of extended Kalman filtering is presented in which both the filtering equation and the associated Riccati equation have been reduced in dimension to allow for real-time processing. The procedure for designing the reduced-order filter is similar to that for designing the extended Kalman filter, the same approximations being applied. One technique useful for limiting the computational burden in a linearized filter design problems is presented and illustrated by an example. The primary limitation of the result is that the nonlinearity must be in terms of the vector to be estimated     

High impedance fault detection device tester

High impedance or down conductor power system fault detection devices are now commercially available for evaluation. However, security and dependability of these devices can not be tested using conventional relay test apparatus and procedures. This paper presents a test apparatus and procedures for testing high impedance fault detection devices. The apparatus is capable of playing back, in real-time, waveforms selected from a data library, which includes seventy seven field recordings of high-impedance faults and feeder loads. Each recording is approximately five minutes long and stored in the form of digitized data sampled at 20 kHz     

Unattached intracranial extra-axial schwannoma

We describe an intracranial extra-axial petroclival schwannoma which did not arise from any cranial nerve, nor was it attached to brain parenchyma or dura. The possible pathogenesis is discussed.