Secondary web-flange interaction in framed-tube buildings

In the conventional plane-frame model of framed-tube buildings, only the primary interaction between the web frame and the flange frame is considered, through vertical shear transfer at corner columns. In addition to this, a secondary interaction takes place due to horizontal shear transfer at each floor level, through the floor slab having high in-plane rigidity. This interaction causes a discrepancy in member forces of a few bottom and top storeys. A simple modification is suggested in the form of an additional cantilever column connected to the conventional plane-frame model by axial force transfer members at every floor level. The improved model yields member forces in all the storeys that are very close to those obtained using 3D analysis.     

Acute choroidal ischemia as a complication of photocoagulation

Acute choroidal vascular insufficiency as a complication of photocoagulation has been little noticed. In 17 eyes of 16 patients photocoagulated with either xenon or argon sources for proliferative sickle cell retinopathy, gray lesions of the fundus developed peripheral to the photocoagulation sites. Histologic examination of similar gray lesions produced in monkeys showed necrosis and atrophy of the outer half of the retina. Intense photocoagulation of the human fundus, even with smaller spot sizes, may occlude a choroidal artery, producing separate gray lesions of distinctive shape. The lesions in both the patients and the monkeys progressed to granular hyperpigmentation by two to three weeks after photocoagulation.     

Interplay of low and highT c phases in Bi-Sr-Ca-Cu-O superconductor

In the Bi-Sr-Ca-Cu-O system stringent conditions of heat-treatment lead to the formation of a mixture of both the low and highT _c phases and obtaining a single-phase material becomes extremely difficult. This study reports preparation of samples with single superconducting transitions at ∼ 75 K and ∼ 108 K; the compositions of which correspond ton=2,3 in the series Bi₂Sr₂Ca _n−1Cu _n O_{4 + 2n} . X-ray diffraction studies show that the lowerT _c material is a relatively pure phase while the higherT _c phase only co-exists with the lowerT _c phase. The most obvious effect of doping the system with lead is to make the reaction take place faster and thereby increase the volume fraction of the 110K phase.     

Linearized reduced-order filtering

A reduced-order version of extended Kalman filtering is presented in which both the filtering equation and the associated Riccati equation have been reduced in dimension to allow for real-time processing. The procedure for designing the reduced-order filter is similar to that for designing the extended Kalman filter, the same approximations being applied. One technique useful for limiting the computational burden in a linearized filter design problems is presented and illustrated by an example. The primary limitation of the result is that the nonlinearity must be in terms of the vector to be estimated     

An efficient neural-network model for real-time fault detection in industrial machine

Neural Computing and Applications - Induction machines have extensive demand in industries as they are used for large-scale production and, therefore, vulnerable to both electrical and mechanical...     

Compiler-assisted energy optimization for clustered VLIW processors

Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by improving the clock speed, reducing the energy consumption of the logic, and making the design simpler, it introduces extra overheads by way of inter-cluster communication. This communication happens over long global wires having high load capacitance which leads to delay in execution and significantly high energy consumption. Inter-cluster communication also introduces many short idle cycles, thereby significantly increasing the overall leakage energy consumption in the functional units. The trend towards miniaturization of devices (and associated reduction in threshold voltage) makes energy consumption in interconnects and functional units even worse, and limits the usability of clustered architectures in smaller technologies. However, technological advancements now permit the design of interconnects and functional units with varying performance and power modes. In this paper, we propose scheduling algorithms that aggregate the scheduling slack of instructions and communication slack of data values to exploit the low-power modes of functional units and interconnects. Finally, we present a synergistic combination of these algorithms that simultaneously saves energy in functional units and interconnects to improves the usability of clustered architectures by achieving better overall energy–performance trade-offs. Even with conservative estimates of the contribution of the functional units and interconnects to the overall processor energy consumption, the proposed combined scheme obtains on average 8% and 10% improvement in overall energy–delay product with 3.5% and 2% performance degradation for a 2-clustered and a 4-clustered machine, respectively. We present a detailed experimental evaluation of the proposed schemes. Our test bed uses the Trimaran compiler infrastructure.     

Compiler-assisted power optimization for clustered VLIW architectures

Clustered VLIW architectures solve the scalability problem associated with flat VLIW architectures by partitioning the register file and connecting only a subset of the functional units to a register file. However, inter-cluster communication in clustered architectures leads to increased leakage in functional components and a high number of register accesses. In this paper, we propose compiler scheduling algorithms targeting two previously ignored power-hungry components in clustered VLIW architectures, viz., instruction decoder and register file.We consider a split decoder design and propose a new energy-aware instruction scheduling algorithm that provides 14.5% and 17.3% benefit in the decoder power consumption on an average over a purely hardware based scheme in the context of 2-clustered and 4-clustered VLIW machines. In the case of register files, we propose two new scheduling algorithms that exploit limited register snooping capability to reduce extra register file accesses. The proposed algorithms reduce register file power consumption on an average by 6.85% and 11.90% (10.39% and 17.78%), respectively, along with performance improvement of 4.81% and 5.34% (9.39% and 11.16%) over a traditional greedy algorithm for 2-clustered (4-clustered) VLIW machine.