Run-time generation of partial FPGA configurations

This paper presents and evaluates a method of generating partial bitstreams at run-time for dynamic reconfiguration of sections of an FPGA. The method is intended for use in adaptive embedded systems that employ run-time reconfiguration to achieve high flexibility and performance. The proposed approach combines partial bitstreams of coarse-grained components to produce a new partial bitstream implementing a given circuit netlist. Topological sorting of the netlist is used to determine the initial positions of individual components, whose placement is then improved by simulated annealing. Connection routing is done by a breadth-first search of the reconfigurable area based on a simplified resource model of the reconfigurable fabric. The desired partial bitstream is constructed by merging together the default bitstream of the reconfigurable area, the relocated partial bitstreams of the components, and the configurations of the switch matrices used for routing. The approach is embodied in a code library that applications can use to create new bitstreams at run-time. For the members of a set of 29 benchmarks (both synthetic and application-derived) having between five and 41 components, the complete process of bitstream generation takes between 8 s and 35 s when running on an embedded PowerPC 405 microprocessor clocked at 300 MHz.     

Register allocation for write activity minimization on non-volatile main memory for embedded systems

Non-volatile memories are good candidates for DRAM replacement as main memory in embedded systems and they have many desirable characteristics. Nevertheless, the disadvantages of non-volatile memory co-exist with its advantages. First, the lifetime of some of the non-volatile memories is limited by the number of erase operations. Second, read and write operations have asymmetric speed or power consumption in non-volatile memory. This paper focuses on the embedded systems using non-volatile memory as main memory. We propose register allocation technique with re-computation to reduce the number of store instructions. When non-volatile memory is applied as the main memory, reducing store instructions will reduce write activities on non-volatile memory. To re-compute the spills effectively during register allocation, a novel potential spill selection strategy is proposed. During this process, live range splitting is utilized to split certain long live ranges such that they are more likely to be assigned into registers. In addition, techniques for re-computation overhead reduction is proposed on systems with multiple functional units. With the proposed approach, the lifetime of non-volatile memory is extended accordingly. The experimental results demonstrate that the proposed technique can efficiently reduce the number of store instructions on systems with non-volatile memory by 33% on average.     

Performance and cost trade-off in Tracking Area reconfiguration: A Pareto-optimization approach

Tracking Area (TA) design is one of the key tasks in location management of Long Term Evolution (LTE) networks. TA enables to trace and page User Equipments (UEs). As UEs distribution and mobility patterns change over time, TA design may have to undergo revisions. For revising the TA design, the cells to be reconfigured typically have to be temporary torn down. Consequently, this will result in service interruption and “cost”. There is always a trade-off between the performance in terms of the overall signaling overhead of the network and the reconfiguration cost. In this paper, we model this trade-off as a bi-objective optimization problem to which the solutions are characterized by Pareto-optimality. Solving the problem delivers a host of potential trade-offs among which the selection can be based on the preferences of a decision maker. An integer programming model has been developed and applied to the problem. Solving the integer programming model for various cost budget levels leads to an exact scheme for Pareto-optimization. In order to deliver Pareto-optimal solutions for large networks in one single run, a Genetic Algorithm (GA) embedded with Local Search (LS) is applied. Unlike many commonly adopted approaches in multi-objective optimization, our algorithm does not consider any weighted combination of the objectives. Comprehensive numerical results are presented in this study, using large-scale realistic or real-life network scenarios. The experiments demonstrate the effectiveness of the proposed approach.     

Integer linear programming optimization of joint RRM policies for heterogeneous wireless systems

Wireless systems will be characterized by the coexistence of heterogeneous Radio Access Technologies (RATs) with different, but also complementary, performance and technical characteristics. These heterogeneous wireless networks will provide network operators the possibility to efficiently and coordinately use the heterogeneous radio resources, for which novel Joint Radio Resource Management (JRRM) policies need to be designed. In this context, this work proposes and evaluates a JRRM policy that simultaneously determines for each user an adequate combination of RAT and number of radio resources within such RAT to guarantee the user/service QoS requirements, and efficiently distribute the radio resources considering a user fairness approach aimed at maximizing the system capacity. To this aim, the JRRM algorithm, which takes into account the discrete nature of radio resources, is based on integer linear programming optimization mechanisms.     

OAZE: A network-friendly distributed zapping system for peer-to-peer IPTV

IPTV systems attracting millions of users are now commonly deployed on peer-to-peer (P2P) infrastructures and provide an appealing alternative to multicast-based systems. Typically, a P2P overlay network is associated with each channel, composed of users who receive, watch and redistribute this channel. Yet, channel surfing (aka as zapping) involves switching overlays and may introduce delays, potentially hurting the user experience when compared to multicast-based IPTV. In this paper, we present a distributed system called OAZE (Overlay Augmentation for Zapping Experience) which speeds up the switching process and reduces the overall cross-domain traffic generated by the IPTV system. In OAZE, each peer maintains connections to other peers, not only in a given channel, but also in a subset of all channels to which the associated user is likely to zap. More specifically, we focus on the channel assignment problem, i.e. determining, in a given P2P overlay, the optimal distribution of the responsibility to maintain contact peers to other channels. We propose an approximate algorithm providing guaranteed performances, and a simpler and more practical one. Our experimental results show that OAZE leads to substantial improvements on the connections between peers, resulting in less switching delay and lower network cost; it then represents an appealing add-on for existing P2P IPTV systems.     

Chord-PKI: A distributed trust infrastructure based on P2P networks

Many P2P applications require security services such as privacy, anonymity, authentication, and non-repudiation. Such services could be provided through a hierarchical Public Key Infrastructure. However, P2P networks are usually Internet-scale distributed systems comprised of nodes with an undetermined trust level, thus making hierarchical solutions unrealistic. In this paper, we propose Chord-PKI, a distributed PKI architecture which is build upon the Chord overlay network, in order to provide security services for P2P applications. Our solution distributes the functionality of a PKI across the peers by using threshold cryptography and proactive updating. We analyze the security of the proposed infrastructure and through simulations we evaluate its performance for various scenarios of untrusted node distributions.     

Usable optimistic fair exchange

Fairly exchanging digital content is an everyday problem. It has been shown that fair exchange cannot be achieved without a trusted third party (called the Arbiter). Yet, even with a trusted party, it is still non-trivial to come up with an efficient solution, especially one that can be used in a p2p file sharing system with a high volume of data exchanged.We provide an efficient optimistic fair exchange mechanism for bartering digital files, where receiving a payment in return for a file (buying) is also considered fair. The exchange is optimistic, removing the need for the Arbiter’s involvement unless a dispute occurs. While the previous solutions employ costly cryptographic primitives for every file or block exchanged, our protocol employs them only once per peer, therefore achieving an O(n) efficiency improvement when n blocks are exchanged between two peers. Our protocol uses very efficient cryptography, making it perfectly suitable for a p-2-p file sharing system where tens of peers exchange thousands of blocks and they do not know beforehand which ones they will end up exchanging. Therefore, our system yields up to one-to-two orders of magnitude improvement in terms of both computation and communication (40 s vs. 42 min, 1.6 MB vs. 200 MB). Thus, for the first time, a provably secure (and privacy-respecting when payments are made using e-cash) fair exchange protocol can be used in real bartering applications (e.g., BitTorrent) [14] without sacrificing performance.     

Secure authentication scheme for passive C1G2 RFID tags

Privacy and security concerns inhibit the fast adaption of RFID technology for many applications. A number of authentication protocols that address these concerns have been proposed but real-world solutions that are secure, maintain low communication cost and can be integrated into the ubiquitous EPCglobal Class 1 Generation 2 tag protocol (C1G2) are still needed and being investigated. We present a novel authentication protocol, which offers a high level of security through the combination of a random key scheme with a strong cryptography. The protocol is applicable to resource, power and computationally constraint platforms such as RFID tags. Our investigation shows that it can provide mutual authentication, untraceability, forward and backward security as well as resistance to replay, denial-ofth-service and man-in-the-middle attacks, while retaining a competitive communication cost. The protocol has been integrated into the EPCglobal C1G2 tag protocol, which assures low implementation cost. We also present a successful implementation of our protocol on real-world components such as the INTEL WISP UHF RFID tag and a C1G2 compliant reader.     

An efficient IP address lookup algorithm based on a small balanced tree using entry reduction

Due to a tremendous increase in internet traffic, backbone routers must have the capability to forward massive incoming packets at several gigabits per second. IP address lookup is one of the most challenging tasks for high-speed packet forwarding. Some high-end routers have been implemented with hardware parallelism using ternary content addressable memory (TCAM). However, TCAM is much more expensive in terms of circuit complexity as well as power consumption. Therefore, efficient algorithmic solutions are essentially required to be implemented using network processors as low cost solutions.Among the state-of-the-art algorithms for IP address lookup, a binary search based on a balanced tree is effective in providing a low-cost solution. In order to construct a balanced search tree, the prefixes with the nesting relationship should be converted into completely disjointed prefixes. A leaf-pushing technique is very useful to eliminate the nesting relationship among prefixes [V. Srinivasan, G. Varghese, Fast address lookups using controlled prefix expansion, ACM Transactions on Computer Systems 17 (1) (1999) 1-40]. However, it creates duplicate prefixes, thus expanding the search tree.This paper proposes an efficient IP address lookup algorithm based on a small balanced tree using entry reduction. The leaf-pushing technique is used for creating the completely disjointed entries. In the leaf-pushed prefixes, there are numerous pairs of adjacent prefixes with similarities in prefix strings and output ports. The number of entries can be significantly reduced by the use of a new entry reduction method which merges pairs with these similar prefixes. After sorting the reduced disjointed entries, a small balanced tree is constructed with a very small node size. Based on this small balanced tree, a native binary search can be effectively used in address lookup issue. In addition, we propose a new multi-way search algorithm to improve a binary search for IPv4 address lookup. As a result, the proposed algorithms offer excellent lookup performance along with reduced memory requirements. Besides, these provide good scalability for large amounts of routing data and for the address migration toward IPv6. Using both various IPv4 and IPv6 routing data, the performance evaluation results demonstrate that the proposed algorithms have better performance in terms of lookup speed, memory requirement and scalability for the growth of entries and IPv6, as compared with other algorithms based on a binary search.