Analog Circuit Fault Detection Using Location of Poles

A method for detection of parametric faults occurring in linear analog circuits based on location of poles of the Circuit Under Test (CUT) is proposed. In the proposed method, the value of each component of the CUT is varied within its tolerance limit using monte carlo simulation. The upper and lower bounds of magnitude, phase angle, real part and imaginary part of all poles of the CUT are obtained. While testing, the locations of poles are obtained. If any one or more of the poles lies outside the tolerance limit then the CUT is declared faulty. The effectiveness of the proposed method is validated through two benchmark circuits like second order sallenkey band pass filter and fourth order leapfrog low pass filter.     

MiniPCI、PCMCIA模块打头阵：WiMAX推进商品化速度

在硝烟弥漫的宽带战场,强大的网络接入能力、低成本、高收益等优点无疑是竞争力所在.WiMAX可作为无线DSL或无线Cable技术来弥补有线技术的不足,同时也被部分业界人士视作新一移动基础设施或第四代无线移动应用的互补技术.目前OEM、ODM相关发展厂商正通过采用具弹性系统架构的ASIC以降低成本,加速WiMAX技术推向市场的时间.     

Silicon Nitride Derived from an Organometallic Polymeric Precursor: Preparation and Characterization

Partially crystalline Si₃N₄, with nanosized crystals and a specific surface area greater than 200 m²/g, is obtained by pyrolysis of a commercially available vinylic polysilane in a stream of anhydrous NH₃ to 1000°C. This polymer does not contain N initially. Crystallization to high-purity α-Si₃N₄ proceeds with additional heating above 1400°C under N₂. The changes in crystallinity, powder morphology, infrared spectra, and elemental compositions, for samples annealed from 1000° to 1600°C under N₂, are consistent with an amorphous-to-crystalline transformation. Although macroscopic consolidation and local densification occur at 1400°C, volatilization and accompanying weight loss limit bulk densification. The effect of temperature on specific surface area is examined and related to the sintering process. These results are applicable to pyrolysis, decomposition, and crystallization studies of ceramics synthesized by polymeric precursor routes.     

High Performance Process Variations Aware Technique for Sub-threshold 8T-SRAM Cell

The demand of low power high density integrated circuits is increasing in modern battery operated portable systems. Sub-threshold region of MOS transistors is the most desirable region for energy efficient circuit design. The operating ultra-low power supply voltage is the key design constraint with accurate output performance in sub-threshold region. Degrading of the performance metrics in Static random access memory (SRAM) cell with process variation effects are of major concern in sub-threshold region. In this paper, a bootstrapped driver circuit and a bootstrapped driver dynamic body biasing technique is proposed to assist write operation which improves the write-ability of sub-threshold 8T-SRAM cell under process variations. The bootstrapped driver circuit minimizes the write delay of SRAM cell. The bootstrapped driver dynamic body bias increases the output voltage levels by boosting factor therefore increasing in switching threshold voltage of MOS devices during hold and read operation of SRAM latch. The increment in threshold voltage improves the static noise margin and minimizing the process variation effects. Monte-Carlo simulation results with 3 \(\sigma \) Gaussian distributions show the improvements in write delay by 11.25 %, read SNM by 12.20 % and write SNM by 12.57 % in 8T-SRAM cell under process variations at 32 nm bulk CMOS process technology node.     

Digital signal propagation delay in a nano-circuit containing reactive and resistive elements

The transient switching delay in a micro/nano-scale circuit containing resistive and reactive elements are sternly affected by the surge in the resistance arising from sub-linear current-voltage (I-V) characteristics limited by the velocity and current saturation. The saturation arises due to the realignment of randomly oriented velocity vectors to the unidirectional streamlined ones in a high electric field when voltage applied across a resistor exceeds its decreasing critical value with reduced channel length. The frequency response f = 1/2πτ_t is affected by a transit time delay τ_t is lower than that predicted from the application of Ohm’s law. The resistance surge dramatically boosts the RC time constant and switching delay and attenuates the L/R time constant and switching delay.     

An Adaptive Neuro-Fuzzy Inference System and Black Widow Optimization Approach for Optimal Resource Utilization and Task Scheduling in a Cloud Environment

Wireless Personal Communications - With the enhancing demand of the cloud computing products, task scheduling issue has become the hot study topic in this area. The task scheduling issue of the...     

The Asymmetric Golden Code for Fast Decoding on Time-Varying Channels

The golden code is a full-rate full-diversity space–time code for the two-input two-output channel with good performance but high decoding complexity. The overlaid Alamouti codes were recently proposed as an alternative; in exchange for a slight performance penalty, they have lower decoding complexity on quasistatic channels with QAM alphabets. However, the complexity advantage of the overlaid codes vanishes for time-varying channels. This paper proposes the asymmetric golden code, a novel full-rate and full-diversity space–time code for the two-input two-output channel that offers reduced-complexity decoding on both quasistatic and time-varying channels.     

Characterization of fluctuation statistics of radar clutter forIndian terrain

Characterization of the fluctuation statistics of radar clutter using Weibull and lognormal distribution models, is presented. Both farmland and sea clutter data measured using a noncoherent, airborne S-band radar are used in the analysis. The clutter data represent the first measurements from an airborne platform over Indian terrain. The values of the distribution parameters estimated using two different techniques have also been presented along with the different criteria used to classify the clutter