Genetic programming of conventional features to detect seizure precursors

This paper presents an application of genetic programming (GP) to optimally select and fuse conventional features (C-features) for the detection of epileptic waveforms within intracranial electroencephalogram (IEEG) recordings that precede seizures, known as seizure precursors. Evidence suggests that seizure precursors may localize regions important to seizure generation on the IEEG and epilepsy treatment. However, current methods to detect epileptic precursors lack a sound approach to automatically select and combine C-features that best distinguish epileptic events from background, relying on visual review predominantly. This work suggests GP as an optimal alternative to create a single feature after evaluating the performance of a binary detector that uses: (1) genetically programmed features; (2) features selected via GP; (3) forward sequentially selected features; and (4) visually selected features. Results demonstrate that a detector with a genetically programmed feature outperforms the other three approaches, achieving over 78.5% positive predictive value, 83.5% sensitivity, and 93% specificity at the 95% level of confidence.     

Coordinating production and distribution of jobs with bundling operations

We consider an integrated scheduling and distribution model in which jobs completed by two different machines must be bundled together for delivery. The objective is to minimize the sum of the delivery cost and customers' waiting costs. Such a model not only attempts to coordinate the job schedules on both machines, but also aims to coordinate the machine schedules with the delivery plan. Polynomial-time heuristics and approximation schemes are developed for the model with only direct shipments as well as the general model with milk-run deliveries.     

Probing stress effects in HfO2 gate stacks with time dependent measurements

Effects of constant voltage stress (CVS) on gate stacks consisting of an ALD HfO₂ dielectric with various interfacial layers were studied with time dependent sensing measurements: DC I–V, pulse I–V, and charge pumping (CP) at different frequencies. The process of injected electron trapping/de-trapping on pre-existing defects in the bulk of the high-κ film was found to constitute the major contribution to the time dependence of the threshold voltage (V_t) shift during stress. The trap generation observed with the low frequency CP measurements is suggested to occur within the interfacial oxide layer or the interfacial layer/high-κ interface, with only a minor effect on V_t.     

Molecular structure and stereoelectronic properties of sarmazenil--a weak inverse agonist at the omega modulatory sites (benzodiazepine receptors): comparison with bretazenil and flumazenil

X-ray diffraction and ab initio MO theoretical calculations were used in order to investigate the structural and electronic properties of sarmazenil, a weak inverse agonist at the omega modulatory sites (benzodiazepine receptors). This compound was compared to bretazenil, a partial agonist, and to the antagonist flumazenil on the basis of structural and electronic data. The conformational and theoretical properties (interatomic pi overlap populations, molecular electrostatic potential (MEP), the topology of frontier orbitals, and proton affinity) of these three imidazobenzodiazepinones were determined in order to analyse the stereoelectronic properties in relation with their distinct intrinsic efficacies at the omega modulatory sites.     

Batch-means control charts for autocorrelated data

Modern statistical process control must often cope with large quantities of highly autocorrelated data. Alwan and Radson (1992) proposed the monitoring of autocorrelated processes by plotting the averages of small batches of data separated by skipping observations. Using results for the AR(1) process, we show that generally better performance can be achieved with no skipping and much larger batch sizes. The resulting batch-means charts derive from methods used in simulation output analysis and can be implemented easily with common digital control systems.     

Sub-optimal solutions to track detection problem using graph theoretic concepts

This paper demonstrates how the problem of tracking targets, which appear as either straight or curved lines in two-dimensional display images (or data images) can be formulated in terms of a directed weighted graph model and how dynamic programming techniques can be efficiently applied to reach an optimal or sub-optimal solution. In general, track detection algorithms providing optimal solutions have good detective ability, but most of them suffer from the inability to detect discontinuous lines or to resolve efficiently pairs of crossing lines. A sub-optimal solution is provided that efficiently overcomes these weaknesses. We focus on modeling the track detection problem in terms of a graph, formulating fast sequential/parallel sub-optimal track detection algorithms and testing them on simulated data in order to show their detective ability. Moreover, we specify the conditions under which sub-optimal algorithms can perform at least as well as their corresponding optimal algorithms. This is significant for the track detection problem where fast, accurate and real-time detection is considered a necessity.     

A new efficient dcvs circuit synthesis technique used for an improved implementation of a serial/parallel multiplier

This paper describes an efficient technique for the design of fault-secure VLSI circuits based on differential cascode voltage switch (DCVS) logic. We propose a new synthesis method for constructing DCVS circuits with a near-optimal transistor count based on binary decision diagrams (BDDs). the time and memory resources required are very low, making the technique practical even for PC-based synthesis tools. This method is the basis for a CAD tool that allows automatic synthesis of fault-secure circuits based on the DCVS technology. We finally present an improved design and implementation of a 2's complement serial/parallel multiplier as an application of the proposed technique and algorithm.