Computer simulation of energy use,greenhouse gas emissions,and costs for alternative methods of processing fluid milk

Computer simulation is a useful tool for benchmarking electrical and fuel energy consumption and water use in a fluid milk plant. In this study, a computer simulation model of the fluid milk process based on high temperature, short time (HTST) pasteurization was extended to include models for processes for shelf-stable milk and extended shelf-life milk that may help prevent the loss or waste of milk that leads to increases in the greenhouse gas (GHG) emissions for fluid milk. The models were for UHT processing, crossflow microfiltration (MF) without HTST pasteurization, crossflow MF followed by HTST pasteurization (MF/HTST), crossflow MF/HTST with partial homogenization, and pulsed electric field (PEF) processing, and were incorporated into the existing model for the fluid milk process. Simulation trials were conducted assuming a production rate for the plants of 113.6 million liters of milk per year to produce only whole milk (3.25%) and 40% cream. Results showed that GHG emissions in the form of process-related CO₂ emissions, defined as CO₂ equivalents (e)/kg of raw milk processed (RMP), and specific energy consumptions (SEC) for electricity and natural gas use for the HTST process alone were 37.6 g of CO₂e/kg of RMP, 0.14 MJ/kg of RMP, and 0.13 MJ/kg of RMP, respectively. Emissions of CO₂ and SEC for electricity and natural gas use were highest for the PEF process, with values of 99.1 g of CO₂e/kg of RMP, 0.44 MJ/kg of RMP, and 0.10 MJ/kg of RMP, respectively, and lowest for the UHT process at 31.4 g of CO₂e/kg of RMP, 0.10 MJ/kg of RMP, and 0.17 MJ/kg of RMP. Estimated unit production costs associated with the various processes were lowest for the HTST process and MF/HTST with partial homogenization at $0.507/L and highest for the UHT process at $0.60/L. The increase in shelf life associated with the UHT and MF processes may eliminate some of the supply chain product and consumer losses and waste of milk and compensate for the small increases in GHG emissions or total SEC noted for these processes compared with HTST pasteurization alone. The water use calculated for the HTST and PEF processes were both 0.245 kg of water/kg of RMP. The highest water use was associated with the MF/HTST process, which required 0.333 kg of water/kg of RMP, with the additional water required for membrane cleaning. The simulation model is a benchmarking framework for current plant operations and a tool for evaluating the costs of process upgrades and new technologies that improve energy efficiency and water savings.     

A third-generation SPARC V9 64-b microprocessor

This quad-issue processor achieves 1-GHz operation through improved dynamic circuit techniques in critical paths and a more extensive on-chip memory system which scales in both bandwidth and latency. Critical logic paths use domino, delayed clocked domino, and logic embedded in dynamic flip-flops for minimum delay. A 64-KB sum-addressed memory data cache combines the address offset add with the cache decode, allowing the average memory latency to scale by more than the clock ratio. Memory bandwidth is improved by using wave pipelined SRAM designs for on-chip caches and a write cache for store traffic. Memory power is controlled without increased latency by use of delayed-reset logic decoders. The chip operates at 1000 MHz and dissipates less than 80 W from a 1.6-V supply. It contains 23 million transistors (12 million in RAM cells) on a 244 mm² die     

Just-in-time policies for single-machine manufacturing flowcontrollers

Single, unreliable machine producing n part types is considered. Using a continuous flow model, conditions are found for the optimality of a just-in-time, or zero-inventory, policy via a stochastic coupling analysis. These conditions are proven to be necessary and conjectured to be sufficient for optimality. This correspondence extends the results of Veatch and Caramanis, in which necessary and sufficient conditions are found for a single machine producing two part types, and it strengthens the results of Perkins and Srikant, in which sufficient conditions are found for n part types     

On the influence of baseline startle reactivity on the indexation of prepulse inhibition.

Prepulse inhibition (PPI) of the startle reflex refers to the reduction of the reflexive startle response to an intense pulse stimulus when its presentation is shortly preceded by a weak prepulse stimulus. PPI is considered as a cross-species translational model of sensorimotor gating, and deficient PPI has been reported in a number of neuropsychiatric disorders. Although a part of the literature is based on the assumption that PPI is independent of the baseline startle reaction, there is accumulating evidence (Csomor et al., 2006; Sandner & Canal, 2007; Yee, Chang, Pietropaolo, & Feldon, 2005) that argues against such an independency. The authors systematically investigated whether PPI indexed as percentage or difference score is dependent on the magnitude of baseline startle reactivity in healthy human volunteers and in C57BL/6 mice. The results revealed that both indexations of PPI were affected by the magnitude of the baseline startle. The authors highlight the pitfalls of different methods to index PPI, especially when startle reactivity differs considerably between groups under comparison, and offer practical recommendations to satisfactorily deal with such baseline differences. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

A new family of semidynamic and dynamic flip-flops with embeddedlogic for high-performance processors

In an attempt to reduce the pipeline overhead, a new family of edge-triggered flip-flops has been developed. The flip-flops belong to a class of semidynamic and dynamic circuits that can interface to both static and dynamic circuits. The main features of the basic design are short latency, small clock load, small area, and a single-phase clock scheme. Furthermore, the flip-flop family has the capability of easily incorporating logic functions with a small delay penalty. This feature greatly reduces the pipeline overhead, since each flip-flop can be viewed as a special logic gate that serves as a synchronization element as well     

Atomistic modeling of the electrostatic and transport properties of a simplified nanoscale field effect transistor

A first-principle model is proposed to study the electrostatic properties of a double-gated silicon slab of nano scale in the framework of density functional theory. The applied gate voltage is approximated as a variation of the electrostatic potential on the boundary of the supercell enclosing the system. With the electron density estimated by the real space Green’s functions, efficient multigrid and fast Fourier-Poisson solvers are employed to calculate the electrostatic potential from the charge density. In the representation of localized SIESTA linear combination of atomic orbitals, the Kohn-Sham equation is established and solved self-consistently for the wavefunction of the system in the local density approximation. The transmission for ballistic transport across the atomic silicon slab at small bias is calculated. The charge distribution and electrostatic potential profile in the silicon slab versus the gate voltage are then analyzed with the help of the equivalent capacitive model. Quantum confinement and short gate effects are observed and discussed.     

Prediction of surface tension of athabasca bitumen

Athabasca bitumen was characterized by dividing it into sixteen pseudo components. Using mean boiling point, molecular weight and specific gravity data, the critical properties of the pseudo components were estimated from available correlations. Two approaches for the prediction of bitumen surface tension were investigated. It was found that the surface tensions predicted by the principle of corresponding states and the Rice-Teja correlations were in general agreement with the published experimental data. In addition, these models successfully predicted the effect of temperature on surface tension at temperatures greater than about 60°C.     

A study on the energy performance of a cooling plant system: Air-conditioning in a semiconductor factory

This paper will focus on the energy performance evaluation of a cooling plant system in a semiconductor factory. Several energy saving technologies namely: integrated cooling towers, free cooling systems, control of the chilled water quantity, etc., have been adopted to improve efficiency of the cooling plant system. We have collected actual operating data for 2 years and evaluated the performance of chillers’ COP and the whole cooling plant system's COP and they showed satisfactory results even if the thermal load of the factory was about half compared with design phase assumption.

We also have verified each effect of the energy saving technologies through model-based simulation analysis. The annual electric power consumption dropped about 35% compared to conventional cooling plant systems in case of design phase thermal load. And the faulty status operation of the chiller's number control miss occurred while we monitored. Electric power consumption increased about 17% compared to normal status operation at the same period.     

Low timing sensitivity receiver structures for CAP

Carrierless amplitude and phase (CAP) is one of the modulation schemes that has been proposed to accomplish the task of transporting high bit-rate data over cheap copper wire pairs. In this paper, we reexamined some CAP receiver structures that have been proposed in the literature and showed that the modified quadrature amplitude modulation receiver can offer a significant advantage over the other receiver structures through its greater immunity to timing phase errors. Our recommendation is based on an analysis of the eye diagram of a received CAP signal