无线局域网接收机用频率综合器的关键技术

对无线局域网接收机用锁相环型频率综合器的几项关键技术进行了研究.首先分析了锁相环型频率综合器的结构并提出了系统的主要参数.采用TSMC 0.18μm射频CMOS工艺设计了一个具有低相位噪声的单片LC调谐型压控振荡器.其在4.189GHz频点上4MHz频偏处所测得的相位噪声为-117dBc/Hz.采用TSMC 0.18μm混合信号CMOS工艺实现了具有低功耗的下变频模块电路.该电路在1.8V电源供电下可正常工作,功耗为13mW.     

多通道俄制军用串行总线FPGA的IP核设计

介绍了俄罗斯军用标准ΓОСТ18977和PTM1495.重点进行了IP核总体设计,收发通道和CPU接口的详细设计,通过设置控制、状态等多功能寄存器实现各通道独立工作,软件设计采用状态机保证了协议通信的正确性,并在Quartus Ⅱ 5.0集成开发环境下予以实现.经验证用本方法设计的IP核能很好地实现8通道同时收发的功能,且各个通道能独立设置通信频率、奇偶校验等,解决了以往该类芯片通道少、功能单一的缺点.     

基于延时估计的实时语音盲分离算法

目前盲分离算法相当复杂,对硬件的运算速度要求很高,无法满足实时性要求。根据盲信号分离的原理和特点,提出了一种基于延时估计的实时语音盲分离算法,大大提高了盲解分离的运算速度,主客观评价表明其具有很好的分离效果,证明了算法的有效性。     

电子装备技术状态自动监测与可靠性分析系统

介绍了电子装备技术状态自动监测与可靠性分析系统的组成、主要功能、技术指标、特点和实现方法,以及应用情况和前景.     

Thermosonic bonding of lead-free solder with metal bump for flip-chip bonding

While extensive research on the lead-free solder has been conducted, the high melting temperature of the lead-free solder has detrimental effects on the packages. Thermosonic bonding between metal bumps and lead-free solder using the longitudinal ultrasonic is investigated through numerical analysis and experiments for low-temperature soldering. The results of numerical calculation and measured viscoelastic properties show that a substantial amount of heat is generated in the solder bump due to viscoelastic heating. When the Au bump is thermosonically bonded to the lead-free solder bump (Sn-3%Ag-0.5%Cu), the entire Au bump is dissolved rapidly into the solder within 1 sec, which is caused by the scrubbing action of the ultrasonic. More reliable solder joints are obtained using the Cu/Ni/Au bump, which can be applied to flip-chip bonding.     

Low-Cost Testing of 5 GHz Low Noise Amplifiers Using New RF BIST Circuit

This paper presents a new low-cost RF BIST (Built-In Self-Test) scheme that is capable of measuring input impedance, gain, noise figure and input return loss for a low noise amplifier (LNA) in RF systems. The RF BIST technique requires an additional RF amplifier and two peak detectors, and its output is a DC voltage level. The BIST circuit is designed using 0.18 μm SiGe technology. The test technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance and gain using the developed mathematical equations. Simulation results are presented for an LNA working at 5 GHz. Measurement data are compared with simulation results to validate the developed mathematical equations. The technique is simple and inexpensive. Jee-Youl Ryu received the BS and MS degrees in 1993 and 1997 from Pukyong National University in Electronic Engineering, Pusan, South Korea respectively. He also received the PhD degree in 2004 from Arizona State University in Electrical Engineering, Arizona, USA. He is currently with Samsung SDI Co., Ltd. His current research interests include RF IC design and testing, MMIC design and testing, analog IC design and testing, passives modeling, testing and analysis, and MEMS technology. Dr. Bruce Kim received the B.S.E.E. degree from the University of California, Irvine in 1981, the M.S. degree in electrical engineering from the University of Arizona in 1985, and the Ph.D. degree in electrical engineering from Georgia Institute of Technology in 1996. He was an Associate Professor at Arizona State University until 2005. Currently, he is an Associate Professor at The University of Alabama. His current research interests include RF IC testing, MEMS integration and VLSI circuits. He has been working on SiP testing technologies, package electrical modeling, and measurements of RF IC packages. Dr. Kim is a 1997 recipient of the National Science Foundation's CAREER Award and received the Meritorious Award from IEEE. He serves as the Chair of the IEEE CPMT Society TC-Electrical Test, associate editor of the IEEE Transactions on Advanced Packaging, associate editor of Design and Test of Computers, and program committee member of Electronic Components and Technology Conference. He is a senior member of IEEE.     

Broadly wavelength-tunable external cavity lasers with extremely low power variation over tuning range

Tunable external-cavity lasers with low power variation over a broad tuning range are demonstrated using asymmetric multiple quantum-wells with a wide and flat gain. For a 2.8-/spl mu/m-wide ridge waveguide laser of cavity length 380 /spl mu/m, when used in a grating external cavity and with an antireflection coating on one facet of laser diode chip, the power variation of less than -1 dB is obtained over a range of 80 nm. This extremely low power variation is a direct result of the spectrally flat gain.     

2/spl times/4 optical add-drop module with no difference in propagation length

We developed a micromachined X-type 2/spl times/4 optical add-drop module (OADM) featuring no difference in propagation length. Four pairs of lensed fibers are aligned in "X" position, and four micromirrors are located between the pairs of optical fibers. The OADM was fabricated utilizing a silicon-on-insulator process. Electrostatic comb actuators can be driven up to 90 /spl mu/m to change the light path within 1 ms. The insertion loss and the on-off ratio were less than 3 and 70 dB, respectively. The loss uniformity in every channel was 1.5 dB.     

A weakness in the Bresson-Chevassut-Essiari-Pointcheval's Group Key Agreement scheme for low-power mobile devices

In this letter, we show that Bresson-Chevassut-Essiari-Pointcheval's Group Key Agreement scheme does not meet the main security properties: implicit key authentication, forward secrecy and known key security. Also, we propose an improved version, which fixes the security flaws, found in the scheme.     

Board-level reliability of Pb-free solder joints of TSOP and various CSPs

To evaluate various Pb-free solder systems for leaded package, thin small outline packages (TSOPs) and chip scale packages (CSPs) including leadframe CSP (LFCSP), fine pitch BGA (FBGA), and wafer level CSP (WLCSP) were characterized in terms of board level and mechanical solder joint reliability. For board level solder joint reliability test of TSOPs, daisy chain samples having pure-Sn were prepared and placed on daisy chain printed circuit board (PCB) with Pb-free solder pastes. For CSPs, the same composition of Pb-free solder balls and solder pastes were used for assembly of daisy chain PCB. The samples were subjected to temperature cycle (T/C) tests (-65/spl deg/C/spl sim/150/spl deg/C, -55/spl deg/C/spl sim/125/spl deg/C, 2 cycles/h). Solder joint lifetime was electrically monitored by resistance measurement and the metallurgical characteristics of solder joint were analyzed by microstructural observation on a cross-section sample. In addition, mechanical tests including shock test, variable frequency vibration test, and four point twisting test were carried out with daisy chain packages too. In order to compare the effect of Pb-free solders with those of Sn-Pb solder, Sn-Pb solder balls and solder paste were included. According to this paper, most Pb-free solder systems were compatible with the conventional Sn-Pb solder with respect to board level and mechanical solder joint reliability. For application of Pb-free solder to WLCSP, Cu diffusion barrier layer is required to block the excessive Cu diffusion, which induced Cu trace failure.