Giant traps on the surface of hydride vapor phase epitaxy-grown free-standing GaN

Extended defects on the top surface of a 250-μm-thick free-standing GaN sample, grown by hydride vapor phase epitaxy (HVPE), were studied by deep level transient spectroscopy (DLTS) and scanning surface potential microscopy (SSPM). For comparison, similar studies were carried out on as-grown HVPE-GaN samples. In addition to the commonly observed traps in as-grown HVPE-GaN, the DLTS measurements on free-standing GaN reveal a very high concentration of deep traps (∼1.0 eV) within about 300 nm of the surface. These traps show nonexponential capture kinetics, reminiscent of those associated with large defects, that can accumulate multiple charges. The SSPM measurements clearly reveal the presence of charged microcracks on the top surface of the sample. It appears that the “giant traps” may be associated with these microcracks, but we cannot rule out the involvement of other extended defects associated with the near-surface damage caused by the polishing/etching procedure.     

Low-frequency noise in TaSiN/HfO/sub 2/ nMOSFETs and the effect of stress-relieved preoxide interfacial layer

Low-frequency noise characteristics are reported for TaSiN-gated n-channel MOSFETs with atomic-layer deposited HfO/sub 2/ on thermal SiO/sub 2/ with stress-relieved preoxide (SRPO) pretreatment. For comparison, control devices were also included with chemical SiO/sub 2/ resulting from standard Radio Corporation of America clean process. The normalized noise spectral density values for these devices are found to be lower when compared to reference poly Si gate stack with similar HfO/sub 2/ dielectric. Consequently, a lower oxide trap density of /spl sim/4/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ is extracted compared to over 3/spl times/10/sup 18/ cm/sup -3/eV/sup -1/ values reported for poly Si devices indicating an improvement in the high-/spl kappa/ and interfacial layer quality. In fact, this represents the lowest trap density values reported to date on HfO/sub 2/ MOSFETs. The peak electron mobility measured on the SRPO devices is over 330 cm/sup 2//V/spl middot/s, much higher than those for equivalent poly Si or metal gate stacks. In addition, the devices with SRPO SiO/sub 2/ are found to exhibit at least /spl sim/10% higher effective mobility than RCA devices, notwithstanding the differences in the high-/spl kappa/ and interfacial layer thicknesses. The lower Coulomb scattering coefficient obtained from the noise data for the SRPO devices imply that channel carriers are better screened due to the presence of SRPO SiO/sub 2/, which, in part, contributes to the mobility improvement.     

Signaling architectures and recovery time scaling for grid applications in IST Project MUPBED

It is now evident to the research community that local computational resources cannot keep up in an economical way with the demands generated by some users/applications. Therefore, distributed computing and the concept of a computational grid are now emerging. Novel transport network concepts are needed to support such visions, and high-speed intelligent optical networking may be the required infrastructure that will enable global grids. Emerging utility grid applications like business continuity and disaster recovery have strong requirements on the dynamic optical networks connecting the distributed grid resources. Supporting grid networking with an intelligent optical network (ION) infrastructure will allow utility grid applications the necessary flexibility with the required QoS (e.g., high bandwidth, reliability, limited delay). Emerging QoS requirements, such as scalable recovery time, highly depend on the ION's signaling architecture. This article gives simple analytical models for the implementation options of optical control plane signaling, shows simulation models for different resilience strategies, and offers some illustrative numerical comparisons to support the aforementioned efforts. This research area is also discussed, among others, in the European research project Multi-Partner European Testbeds for Research Networking (MUPBED).     

Nano-Watt silicon-on-sapphire ADC using 2C-1C capacitor chain

An analogue-to-digital converter (ADC) in a 0.5 /spl mu/m silicon-on-sapphire CMOS technology is reported. This innovative ADC uses a 2C-1C capacitor chain and a switched capacitor comparator. The ADC is capable of sampling at 409 kS/s, consuming 900 nW at 1.1 V power supply and 1.35 /spl mu/W at 1.5 V. It uses an active area of 300/spl times/700 /spl mu/m/sup 2/ and 640/spl times/1070 /spl mu/m/sup 2/ with pads.     

Noise limit in heterodyne Interferometer demodulator for FBG-based sensors

This paper reports the results of a recent investigation on the noise-limited performance in heterodyne interferometric demodulation systems for fiber Bragg grating strain sensors. Theoretical and simulation results are presented and compared with experimental results.     

A new PWM controller with one-cycle response

This paper proposes a new nonlinear control technique that has one-cycle response, does not need a resetable integrator in the control path, and has nearly constant switching frequency. It obtains one-cycle response by forcing the error between the switched variable and the control reference to zero each cycle, while the on and off pulses of the controller are adjusted each cycle to ensure near constant switching frequency. The small switching frequency variation due to changes in the reference signal and supply voltage and delays in the circuit are quantified. Using double-edge modulation, the switching frequency variation is further reduced, thus, the associated signal distortion is minimized. An experimental 0-20 kHz bandwidth 95 W RMS power audio amplifier using the control method demonstrates the applicability of this control technique for high-fidelity audio applications. The amplifier has a power supply ripple rejection (PSRR) of 63 dB at 120 Hz. Additionally, the total harmonic distortion plus noise (THD+N) is less than 0.07% measured with a power supply ripple of 15%     

Temperature dependence of lasing characteristics forlong-wavelength (1.3-μm) GaAs-based quantum-dot lasers

Data are presented on the temperature dependence of 1.3-μm wavelength quantum-dot (QD) lasers. A low-threshold current density of 90 A/cm² is achieved at room temperature using high reflectivity coatings. Despite the low-threshold current density, lasing at the higher temperatures is limited by nonradiative recombination with a rapid increase in threshold current occurring above ~225 K. Our results suggest that very low threshold current density (⩽20 A/cm ²) can be achieved at room temperature from 1.3-μm QD lasers, once nonradiative recombination is eliminated     

A comparison of the temperature dependences of photoeffect quantum efficiencies in GaAs p-n structures and Schottky diodes

A comparison is made of how the quantum efficiencies for photoelectric conversion in p-n-and m-s-structures based on GaAs depend on temperature. For photon energies less than or the same order as the width of the band gap, the temperature dependences of the p-n-and m-s-structures are similar. In the range of photon energies larger than the width of the band gap, the quantum efficiency of p-n-structures is temperature independent, whereas the quantum efficiency of m-s-structures exhibits a strong temperature dependence. A qualitative explanation of this phenomenon is given. Fiz. Tekh. Poluprovodn. 33, 876–879 (July 1999)     

Optically active layers of silicon doped with erbium during sublimation molecular-beam epitaxy

A study is made of the electrical, optical, and structural properties of Si:Er layers produced by sublimation molecular-beam epitaxy. The Er and O contents in the layers, grown at 400–600°C, were as high as 5×10¹⁸ and 4×10¹⁹ cm⁻³, respectively. The electron concentration at 300 K was ∼10% of the total erbium concentration and the electron mobility was as high as 550 cm²/(V·s). Intense photoluminescence at 1.537 μm was observed from all the structures up to 100–140 K. The structure of the optically active centers associated with Er depended on the conditions under which the layers were grown. Fiz. Tekh. Poluprovodn. 33, 156–160 (February 1999)     

Metrics and Criteria for Quality Assessment of Testable Hw/Sw Systems Architectures

The purpose of this paper is to present a novel methodology for assessing the quality of architecture solutions of hw/sw systems, with particular emphasis on testability. Criteria and metrics for quality assessment are proposed and used to assist the design team in selecting a best-fitted architecture that satisfies not only functional requirements, but also test requirements. The methodology makes use of object-oriented modeling techniques. Near-optimum clustering of methods and attributes into objects is carried out, in such a way that objects with moderate complexity, low coupling and high functional autonomy, result. The main features of the methodology are ascertained through a case study.