Tuning the dielectric,ferroelectric and electromechanical properties of Ba0.83Ca0.10Sr0.07TiO3–MnFe2O4 multiferroic composites

We report the successful synthesis of Ba_0.83Ca_0.10Sr_0.07TiO₃–MnFe₂O₄ multiferroic composites showing significant improvement in electromechanical and magnetoelectric properties. All the composite samples have formed a diphasic perovskite-ferrite composite without the presence of any impurity or intermediate phase. The bare as well as composite samples have shown classical dielectric behavior even at higher ferrite substituted samples. The electrical characteristics of composite samples have shown slight deterioration, which is mainly attributed to non-ferroelectric MnFe₂O₄. However, the composites still exhibit high enough piezoelectric behavior and the modification in the electromechanical response of composites is mainly caused by a change in applied stress with MnFe₂O₄ addition. The M-H loops of composites have demonstrated a ferrimagnetic behavior with a substantial increase in saturation magnetization on increasing the ferrite concentration. Further, the composites have shown better coupling between the ferroelectric and ferrimagnetic phases, which has resulted in an improved magnetoelectric characteristic. The role of oxygen vacancies on ferroelectric and magnetic properties of prepared composites has been systematically studied.     

A novel implementation of combined systolic and folded architectures for adaptive filters in FPGA

The adaptive filter constitutes an important part of statistical signal processing. Adaptive filters are often realized either as a set of program instructions running on an arithmetical processing device such as a Microprocessor or Digital Signal Processing (DSP) chip, or as a set of logic operations implemented in a field programmable gate array (FPGA) or in Very Large Scale Integrated Circuit (VLSI). Systolic architecture improves the speed of the system at the cost of increased area. On the other hand, folding technique uses less hardware resources. A combination of systolic and folding structures provides improvement in speed and reduction in area. This paper presents a novel idea of combining Systolic and Folding architectures and its design in various adaptive filters like Recursive Least Square (RLS), Affine Projection (AP) and Kalman filters. The structures are designed using Xilinx System Generator tool of MATlab 2015 and implemented in Xilinx Virtex 5 FPGA. The designed structures are tested for noise cancellation in Electrocardiogram (ECG) signal and results are analysed for various order of all the filters and its metrics are analysed in terms of Signal to Noise Ratio(SNR), Mean Square Error(MSE), area and speed. From the analysis it is observed that the proposed folding in systolic structures improves SNR by 6.77% in RLS, 4.68% in Affine projection and 2.13% in Kalman Algorithm than the conventional structures. It is inferred that the proposed design in Affine projection shows improved SNR than the other filters. The proposed combined folding in systolic architecture shows 18.35% reduction in area and reduction in delay.     

Smart methodology for performance improvement of energy sources for home application

The integrated solar and wind serves as a major contributor's for clean electrification in many nations. In this technical era energy crisis is primary issue due to depletion of nonconventional resources. Solar and wind available are chargeless. The hybrid energy can be installed for domestic or commercial purpose, it is required to meet impetration of power. To meliorate the pursuance of the hybrid energy, installed the continuous real time monitoring becomes necessary. IoT helps in monitoring the system by providing the detailed values of different parameters of plant over a dedicated IP address. This helps to maintain the plant over long distances by getting to know the values and thus maintain it to the desired levels. IoT helps in communicating the performance of the power generated and helps controlling the switch over between the energy sources available. A framework for energy source integrated with IoT is proposed to have fly back converter in continuous conduction mode along with multilevel inverter to decline the stress of current and escalate the power efficiency. The proposed venture not only helps in monitoring, controlling energy flow without any manual interference and power interruption, but also increases the productivity for the consumer and is highly reliable. In order to affirm the suggested venture a prototype module is made and executed.     

An FPGA multiprocessor architecture for Bayesian online change point detection using stochastic computation

In this paper we report on an event-based stochastic architecture for the Adams/McKay Bayesian Online Change Point Detection algorithm (BOCPD) [1]. In the stochastic computational structures, probabilities are represented natively as stochastic events and computation is carried out directly with these probabilities and not probability density functions. A fully programmable BOCPD processor is synthesized in VHDL. The BOCPD algorithm with on-line learning, to perform foreground/background image segmentation with online learning. Running on a single Kintex 7 FPGA (Opal Kelly XEM7350-K410T) the architecture is capable of real-time processing a 160 × 120 pixels image, at 10 frames per second.     

Automatic illumination control for an endoscopy sensor

Endoscopy and small surgery can be performed with the support of small cameras. These cameras need to be minimal to reduce intrusion, require fast response and automatic illumination. The current work describes the world's smallest camera for endoscopy, NanEye, and the dynamic control algorithm for ROI developed for the illumination LED source coupled to the camera head that allows adjusting light, gain and exposure time. The obtained results show that it is capable of achieving correction speeds under 1 s while maintaining a static error below 3% relative to the total number of pixels of the image. The result of this work will allow the integration of high brightness LED sources of millimeter size on a very small camera enabling its use in endoscopic surgical robotic operations or minimal invasive surgery and NanEye is expected to be supplied at low prices for single time use.     

A custom processor for protocol-independent packet parsing

Networking devices such as switches and routers have traditionally had fixed functionality. They have the logic for the union of network protocols matching the application and market segment for which they have been designed. Possibility of adding new functionality is limited. One of the aims of Software Defined Networking is to make packet processing devices programmable. This provides for innovation and rapid deployment of novel networking protocols. The first step in processing of packets is packet parsing. In this paper, we present a custom processor for packet parsing. The parser is protocol-independent and can be programmed to parse any sequence of headers. It does so without the use of a Ternary Content Addressable Memory. As a result, the area and power consumption are noticeably smaller than in the state of the art. Moreover, its output is the same as that of the parser used in the Reconfigurable Match Tables (RMT). With an area no more than that of parsers in the RMT architecture, it sustains aggregate throughput of 3.4 Tbps in the worst case which is an improvement by a factor of 5.     

Design of PWM with four transistor comparator for DC–DC boost converters

The DC-DC converter is used for different applications which needs higher voltages when compared to the input source. The boost converter is one of the most efficient methods to choose DC-DC Converter in different ways. The purpose of the proposed method is to reduce the area of VLSI design logic and power consumption. Boost converter topology is difficult because it has a large component. The proposed work of four transistor comparator based PWM (Pulse width Modulator) that can be used in DC-DC boost converter, which reduces the area, and power consumption of the entire system. This proposed work calculates the parameters of boost converter and the simulation performed using different duty cycle and parameters. Simulation results shows different duty cycles with different resistance and inductance parameters using boost converter. In addition to this the result carries out four transistor comparator output which is used to reduce the boost converter circuit design. PWM is based on the proposed four transistor comparator, which is used in the Cadence Virtuoso software using conventional CMOS technology.     

Deep Learning-Based FOPID Controller for Cascaded DC-DC Converters

Smart grids and their technologies transform the traditional electric grids to assure safe, secure, cost-effective, and reliable power transmission. Non-linear phenomena in power systems, such as voltage collapse and oscillatory phenomena, can be investigated by chaos theory. Recently, renewable energy resources, such as wind turbines, and solar photovoltaic (PV) arrays, have been widely used for electric power generation. The design of the controller for the direct Current (DC) converter in a PV system is performed based on the linearized model at an appropriate operating point. However, these operating points are ever-changing in a PV system, and the design of the controller is usually accomplished based on a low irradiance level. This study designs a fractional-order proportional-integrated-derivative (FOPID) controller using deep learning (DL) with quasi-oppositional Archimedes Optimization algorithm (FOPID-QOAOA) for cascaded DC-DC converters in micro-grid applications. The presented FOPID-QOAOA model is designed to enhance the overall efficiency of the cascaded DC-DC boost converter. In addition, the proposed model develops a FOPID controller using a stacked sparse autoencoder (SSAE) model to regulate the converter output voltage. To tune the hyper-parameters related to the SSAE model, the QOAOA is derived by the including of the quasi-oppositional based learning (QOBL) with traditional AOA. Moreover, an objective function with the including of the integral of time multiplied by squared error (ITSE) is considered in this study. For validating the efficiency of the FOPID-QOAOA method, a sequence of simulations was performed under distinct aspects. A comparative study on cascaded buck and boost converters is carried out to authenticate the effectiveness and performance of the designed techniques.     

Advanced superior execution time optimal time-frequency filter suitable for non-linear FM signals estimation

Optimal time-frequency (TF) filter suitable for non-linear frequency-modulated (FM) signals estimation is developed. It is developed to suppress some flaws of the recent state-of-the-art signal adaptive and fully pipelined filtering solutions and, therefore, is based on a new real-time procedure for the filter's region of support estimation, also proposed here. The proposed filter shows superior execution time performances and optimal calculation and hardware complexity properties, so it retains all desirable properties of the signal adaptive solution and the fully pipelined one, but also extends their applicability to the non-linear FM signals. The filter is implemented on the field-programmable gate array (FPGA) device and is proven by testing on real non-stationary multicomponent noisy signals.