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991.
一种计算声表面波在周期栅阵中传播特性的方法   总被引:1,自引:1,他引:0  
徐方迁  金步平 《声学技术》2008,27(4):612-615
Hashimoto有限元程序是日本Chiba大学研究人员从1973年开始、历时几十年用Fortran语言编写、计算声表面波在周期栅阵中传波特性的一个软件包。该程序能计算Rayleigh波、漏表面波、SH型表面波、表面横波等多种声表面波的传输特性,同时它能适用于一个周期内单根指条、两根指条和多根指条及声表面波在栅阵中斜入射的情况。该程序已在声表面波(SAW)研究人员中得到了广泛的应用。  相似文献   
992.
This paper presents adaptive channel prediction techniques for wireless orthogonal frequency division multiplexing (OFDM) systems using cyclic prefix (CP). The CP not only combats intersymbol interference, but also precludes requirement of additional training symbols. The proposed adaptive algorithms exploit the channel state information contained in CP of received OFDM symbol, under the time-invariant and time-variant wireless multipath Rayleigh fading channels. For channel prediction, the convergence and tracking characteristics of conventional recursive least squares (RLS) algorithm, numeric variable forgetting factor RLS (NVFF-RLS) algorithm, Kalman filtering (KF) algorithm and reduced Kalman least mean squares (RK-LMS) algorithm are compared. The simulation results are presented to demonstrate that KF algorithm is the best available technique as compared to RK-LMS, RLS and NVFF-RLS algorithms by providing low mean square channel prediction error. But RK-LMS and NVFF-RLS algorithms exhibit lower computational complexity than KF algorithm. Under typical conditions, the tracking performance of RK-LMS is comparable to RLS algorithm. However, RK-LMS algorithm fails to perform well in convergence mode. For time-variant multipath fading channel prediction, the presented NVFF-RLS algorithm supersedes RLS algorithm in the channel tracking mode under moderately high fade rate conditions. However, under appropriate parameter setting in \(2\times 1\) space–time block-coded OFDM system, NVFF-RLS algorithm bestows enhanced channel tracking performance than RLS algorithm under static as well as dynamic environment, which leads to significant reduction in symbol error rate.  相似文献   
993.
A low voltage self-biased high-swing cascode current mirror using bulk-driven quasi-floating gate MOSFET is proposed in this paper. The proposed current mirror bandwidth and especially the output impedance show a significant improvement compared to prior arts. The current mirror presented is designed using bulk-driven and bulk-driven quasi-floating gate N-channel MOS transistors, which helped it to operate at very low supply voltage of \({\pm }0.2\,\hbox {V}\). To achieve high output resistance, the current mirror uses regulated cascode stage followed by super cascode architecture. The small-signal analysis carried out proves the improvement achieved by proposed current mirror. The current mirror circuit operates well for input current ranging from 0 to \(250\,{\upmu }\mathrm{A}\) with good linearity and shows the bandwidth of 285 MHz. The input and output resistances are found as \(240\,\Omega \) and \(19.5\,\hbox {G}\Omega \), respectively. Further, the THD analysis and Monte Carlo simulations carried prove the robustness of proposed current mirror. The complete analysis is done using HSpice on UMC \(0.18\,\upmu \mathrm{m}\) technology.  相似文献   
994.
The optical access networks (OANs) provide an attractive solution to the bandwidth bottleneck problem of the last mile. However, it has been proved (Baliga et al. in J Lightwave Technol 27(13):2391–2403, 2009; Baliga et al. in IEEE Commun Mag 49(6):70–77, 2011) that the OAN consumes a significant ratio of the total energy consumed in an optical networking scenario. This has provided incentive for inspection of energy-efficient schemes for OANs. It has been demonstrated in the literature that energy consumption figures of an OAN can be improved by either designing efficient hardware or employing better media access control (MAC) protocols. In this paper, we design a MAC protocol for OANs to ensure energy-efficiency in the presence of quality of service (QoS)-aware traffic. The proposed scheme incorporates traffic prediction-based selection of different sleep (energy-efficient) modes of operation, of the optical network units—ONUs (OAN end units). It also implements switching between different sleep modes to maintain high QoS with significant energy-efficiency figures. The discussed scheme requires processing at the ONU only and can work independent of the entire OAN (ONU assisted). Thus, our proposal is an attractive solution for the already deployed networks or even in green field deployment.  相似文献   
995.
This study proposes a subsystem consisting of an analog buffer and a single‐ended input to a fully differential ΔΣ modulator to obtain low‐power consumption for portable electrocardiogram applications. With the proposed subsystem, the need for an inverting amplifier is avoided, and low‐power consumption is achieved. The ΔΣ modulator with a second order, 1 bit, and cascade of integrators feedforward structure consumes a low power, in which an inverting and a non‐inverting path implement a single‐ended input to fully‐differential signals. A double sampling technique is proposed for a digital‐to‐analog converter feedback circuit to reduce the effect of the reference voltage, reduce the amplifier requirements, and obtain low‐power consumption. Input‐bias and output‐bias transistors working in the weak‐inversion region are implemented to obtain an extremely large swing for the analog buffer. At a supply voltage of 1.2 V, signal bandwidth of 250 Hz, and sampling frequency of 128 kHz, the measurement results show that the modulator with a buffer achieves a 77 dB peak signal‐to‐noise‐distortion ratio, an effective‐number‐of‐bits of 12.5 bits, an 83 dB dynamic range, and a figure‐of‐merit of 156 dB. The total chip size is approximately 0.28 mm2 with a standard 0.13 µm Complementary Metal‐Oxide‐Silicon (CMOS) process. Copyright © 2016 John Wiley & Sons, Ltd.  相似文献   
996.
PTN技术传输继电保护业务若干问题的研究   总被引:1,自引:0,他引:1       下载免费PDF全文
随着PTN技术在电力通信网中的应用,其传输继电保护业务的可行性需要深入研究。通过分析PTN的两种主流技术PBT(Provider Backbone Transport)和T-MPLS(Transport MPLS)的特点,从通道备用方式、时延、TDM仿真以及交换等多个方面论述了其传输继电保护业务的可行性。首先从接口速率、时延、误码、通道四个方面分析继电保护业务对性能指标的要求。结合相关时延公式,重点研究传输继电保护业务的发送/接收时延和转发交换时延,在技术选择、路由配置等方面给出了建议。从可靠性的角度研究线性保护倒换方式的选择,并给出了建议方案。  相似文献   
997.
In this paper, the RF and DC behaviours of a SiN-passivated 20-nm gate length metamorphic high electron mobility transistor (MHEMT) on GaAs substrate with \({\updelta }\)-doped sheets on either side of the composite channel are studied using the Synopsys TCAD tool. The 20-nm enhancement-mode MHEMT with \({\updelta }\)-doped sheets on either side of the \(\hbox {In}_{0.75}\hbox {Ga}_{0.25}\hbox {As}\)/InAs/ \(\hbox {In}_{0.75}\hbox {Ga}_{0.25}\hbox {As}\) multilayer channel shows a transconductance of 3000 mS/mm, cut-off frequency (\({f}_{\mathrm{T}}\)) of 760 GHz and a maximum-oscillation frequency (\({f}_{\mathrm{max}}\)) of 1270 GHz. The threshold voltage of the device is found to be 0.07 V. The room-temperature Hall mobilities of the two-dimensional sheet charge density (2DEG) are measured to be over \(12800\,\hbox {cm}^{2}\)/Vs with a sheet charge density larger than 4 \(\times \) \(10^{12}\,\hbox {cm}^{-2}\). These high-performance enhancement-mode MHEMTs are attractive candidates for future terahertz applications such as high-resolution radars for space research and also for low-noise wide-bandwidth amplifier for future communication systems.  相似文献   
998.
A comparative performance analysis in terms of delay, power dissipation, power delay product (PDP), and crosstalk noise between SWCNT bundle interconnects with resistance estimated using conventionally (temperature independent model), and thermally aware model is investigated. The results are also compared with those of currently used copper interconnects at 22 nm technology node. It is observed that, with rise in temperature from 300 to 500 K, SWCNT bundles have a lower delay than that of copper interconnect at different lengths from 100 to \(1000\,\upmu \hbox {m}\) whereas reverse is true for power dissipation. The SPICE simulation results further reveal that for temperature variations ranging from 300 to 500 K, compared to conventional metal (copper) conductors, crosstalk noise voltage levels (positive peaks) in capacitively coupled SWCNT bundle, at the far end of victim line, are significantly low. Moreover, a relative average improvement in delay, power, and PDP using a thermally aware model in comparison with a temperature independent model is about 22.44, 7.59 and 31.96 %, respectively, with length variations from 100 to \(1000\,\upmu \hbox {m}\), whereas for varied tube diameter is about 16.6, 5.6 and 19.72 %, respectively. The average relative improvement in the time duration reduction of victim output, for varied tube diameters, is about 21.7 % by using a thermally-aware model instead of a temperature-independent model of an SWCNT bundle resistance.  相似文献   
999.
Energy and routing efficiency is a long-research topic from past decades in the area of MANET. The prior research contribution focusing on addressing both the issues are associated with issues like (1) few benchmarked studies, (2) adoption of conventional routing protocols based on shortest path to mitigate both issues, and (3) inefficient design principles of routing. Hence, this paper proposes a novel routing protocol in mobile ad hoc network (MANET) termed as MECOR i.e. minimal energy consumption with optimized routing. MECOR presents a simple communication strategy based on mathematical and signaling properties of mobile nodes in MANET to jointly address the energy and routing issues in MANET. The outcome of the MECOR was compared with conventional routing algorithm as well as recent studies of energy efficient routing policy to find that MECOR can minimize 58.82 % of energy in most challenging mobility scenarios of MANET.  相似文献   
1000.
A novel architecture of a pipelined redundant-signed-digit analog to digital converter(RSD-ADC) is presented featuring a high signal to noise ratio(SNR), spurious free dynamic range(SFDR) and signal to noise plus distortion(SNDR) with efficient background correction logic. The proposed ADC architecture shows high accuracy with a high speed circuit and efficient utilization of the hardware. This paper demonstrates the functionality of the digital correction logic of 14-bit pipelined ADC at each 1.5 bit/stage. This prototype of ADC architecture accounts for capacitor mismatch, comparator offset and finite Op-Amp gain error in the MDAC(residue amplification circuit) stages. With the proposed architecture of ADC, SNDR obtained is 85.89 dB, SNR is 85.9 dB and SFDR obtained is 102.8 dB at the sample rate of 100 MHz. This novel architecture of digital correction logic is transparent to the overall system, which is demonstrated by using 14-bit pipelined ADC. After a latency of 14 clocks, digital output will be available at every clock pulse. To describe the circuit behavior of the ADC, VHDL and MATLAB programs are used. The proposed architecture is also capable of reducing the digital hardware. Silicon area is also the complexity of the design.  相似文献   
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