Effects and interactions of design parameters for gold-plated electric contacts

Many of the reliability issues affecting separable connectors can be traced to the contact interface. In order to design robust, reliable connectors and sockets, the effects and interactions of design parameters on the reliability of the contact interface must be examined, especially in the limited design space presented by such applications as high density LGA sockets. A full test matrix was applied with varying levels of normal force, gold-plating thickness, contact geometry, mixed flowing gas exposure, and wipe. A statistical analysis of the results and multiple linear regression models are also presented. When making contact to gold-plated surfaces, the presence of corroded pore sites dramatically affected the contact resistance. Contact resistance readings were taken both on and off corroded pore sites. When contact was made off corroded pore sites, the resistance values were not significantly higher than unexposed gold values and the combination of normal force and contact geometry were the most significant variables. Small amounts of wipe were shown to decrease the contact resistance and backwipe was shown to have little effect on the contact resistance. Contact on corroded pore sites was found to yield extremely high contact resistance readings, many of which were open-circuit. In general, satisfactory results were achieved if contact was not attempted on corroded pore sites.     

Complex network dimension and path counts

Large complex networks occur in many applications of computer science. The complex network zeta function and the graph surface function have been used to characterize these networks and to define a dimension for complex networks. In this work we present three new results related to the complex network dimension. First, we show the relationship of the concept to Kolmogorov complexity. Second, we show how the definition of complex network dimension can be reformulated by defining the concept for a single node, and then defining the complex network dimension as the supremum over all nodes. This makes the concept work better for formally infinite graphs. Third, we study interesting parallels to zeta dimension, a notion originally from number theory which has found connections to theoretical computer science. These parallels lead to a deeper insight into the complex network dimension, e.g., the formulation in terms of the entropy and a theorem relating dimension to connectivity.     

Radioscopic visualization of isothermal solidification of eutectic Ga-ln alloy

R. DEREBAIL, formerly Research Associate, Department of Aerospace Engineering Sciences, University of Colorado.     

A framework for assessing amorphous oxide semiconductor thin‐film transistor passivation

Amorphous oxide semiconductor thin‐film transistors (TFTs) are moving towards commercialization for a variety of display applications. Invariably, display applications require a bottom‐gate TFT configuration in which passivation of the top channel layer surface is required. The objective of this work is to propose a conceptual model framework for assessing TFT passivation schemes, within the context of amorphous oxide semiconductor electronics. This model involves first estimating the energy of the charge neutrality levels (CNLs) for the channel and passivation layers. Then, an energy band diagram is drawn to establish the relative position of these CNLs prior to their establishment of intimate contact. A situation in which the passivation layer CNL is below that of the channel layer CNL is considered undesirable because interface state electronic transfer from the channel to the passivation layer leads to formation of an accumulation layer at this interface. Although the opposite case in which the passivation layer CNL is above that of the channel layer CNL is more desirable, the ideal situation would be when both CNLs align because no interface state electronic transfer would occur. This framework is then employed in a discussion of the passivation of indium gallium zinc oxide and zinc tin oxide bottom‐gate TFTs.     

Tellurium induced lattice dilation in OMVPE grown InP

For organometallic vapor phase epitaxial (OMVPE) grown InP, the change in lattice constant is measured as a function of tellurium (Te) dopant concentration. We observe ~0.15% dilation in the InP lattice constant at a Te concentration of ~10²⁰ cm^-3. Our measurements are compared to predictions from Vegard’s Law.     

Scalable concurrent computing

This paper focusses on the challenge of building and programming scalable concurrent computers. The paper describes the inadequacy of current models of computing for programming massively parallel computers and discusses three universal models of concurrent computing — developed respectively by programming, architecture and algorithm perspectives. These models provide a powerful representation for parallel computing and are shown to be quite close. Issues in building systems architectures which efficiently represent and utilize parallel hardware resources are then discussed. Finally, we argue that by using a flexible universal programming model, an environment supporting heterogeneous programming languages can be developed.     

Random Tendencies and Event Dependencies

Calculating the outcome-probability of a chance event is influenced by the statistical dependencies, viz, s-dependencies among the possible outcomes. This paper shows how to account for these s-dependencies, viz, it is a tutorial on s-dependence. Much of the rigor has been omitted, ie, no theorems and few definitions. Practical examples describe the use of probability statements rather than show their proofs. The early examples use a familiar topic: the result when a single fair die is tossed. The references can be used when more depth or rigor is needed. In areas of more strict application where contractual requirements are involved, for example, the reader should consult a statistician.     

Cover Picture: High Definition Digital Fabrication of Active Organic Devices by Molecular Jet Printing (Adv. Funct. Mater. 15/2007)

A new method for direct patterning of organic optoelectronic/electronic devices using a reconfigurable and scalable printing method is reported by Vladimir Bulovic and co‐workers on p. 2722. The printing technique is applied to the fabrication of high‐resolution printed organic light emitting devices (OLEDs) and organic field effect transistors (OFETs). Remarkably, the final print‐deposited films are evaporated onto the substrate (rather than solvent printed), giving high‐quality, solvent‐free, molecularly flat structures that match the performance of comparable high‐performance unpatterned films. We introduce a high resolution molecular jet (MoJet) printing technique for vacuum deposition of evaporated thin films and apply it to fabrication of 30 μm pixelated (800 ppi) molecular organic light emitting devices (OLEDs) based on aluminum tris(8‐hydroxyquinoline) (Alq₃) and fabrication of narrow channel (15 μm) organic field effect transistors (OFETs) with pentacene channel and silver contacts. Patterned printing of both organic and metal films is demonstrated, with the operating properties of MoJet‐printed OLEDs and OFETs shown to be comparable to the performance of devices fabricated by conventional evaporative deposition through a metal stencil. We show that the MoJet printing technique is reconfigurable for digital fabrication of arbitrary patterns with multiple material sets and high print accuracy (of better than 5 μm), and scalable to fabrication on large area substrates. Analogous to the concept of “drop‐on‐demand” in Inkjet printing technology, MoJet printing is a “flux‐on‐demand” process and we show it capable of fabricating multi‐layer stacked film structures, as needed for engineered organic devices.