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91.
The microcosmic mechanism of electroluminescence in polymer light emitting diodes (PLEDs) is the recombination of the oppositely charged polarons. In previous studies, it has been demonstrated that the temperature-induced irregular lattice vibration may have non-negligible influence on polaron dynamics. Nevertheless, there are few reports about thermal effect on recombination process between polaron pair, although it is very important for the performance of PLEDs. In this paper, we adopt the modified one-dimensional tight-binding model, including to which the thermal random force, and explore the temperature effect on polaron collision driven by electric field with different strengths. The dynamical simulation is performed by using the non-adiabatic evolution method. The results show that under the influence of electric field, the oppositely charged polarons could recombine into either an exciton with one lattice distortion, or the mixed state of polaron pair and exciton with two lattice distortions. It depends on both field strength and temperature. Anyway, after including temperature effect, a significant improvement of exciton yield is obtained. In addition, the new-formed exciton could perform a random walk along the polymer chain driven by the thermal random force when its strength is large enough. If we further increase the temperature, the stability of exciton would become worse.  相似文献   
92.
93.
An important research problem, at the basis of the development of embedded systems for neuroprosthetic applications, is the development of algorithms and platforms able to extract the patient’s motion intention by decoding the information encoded in neural signals. At the state of the art, no portable and reliable integrated solutions implementing such a decoding task have been identified. To this aim, in this paper, we investigate the possibility of using the MPSoC paradigm in this application domain. We perform a design space exploration that compares different custom MPSoC embedded architectures, implementing two versions of a on-line neural signal decoding algorithm, respectively targeting decoding of single and multiple acquisition channels. Each considered design points features a different application configuration, with a specific partitioning and mapping of parallel software tasks, executed on customized VLIW ASIP processing cores. Experimental results, obtained by means of FPGA-based prototyping and post-floorplanning power evaluation on a 40nm technology library, assess the performance and hardware-related costs of the considered configurations. The reported power figures demonstrate the usability of the MPSoC paradigm within the processing of bio-electrical signals and show the benefits achievable by the exploitation of the instruction-level parallelism within tasks.  相似文献   
94.
Low-voltage organic thin-film transistors (TFTs) based on four different small-molecule semiconductors (pentacene, DNTT (dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene), C10-DNTT and DPh-DNTT) were fabricated, and a detailed comparison of the semiconductor thin-film morphology, of the current-voltage characteristics of transistors with channel lengths ranging from 100 to 1 μm, and of the contact resistances is provided. The three thienoacene derivatives DNTT, C10-DNTT and DPh-DNTT all have significantly larger charge-carrier mobilities and smaller contact resistances than pentacene. In terms of the intrinsic channel mobility (determined using the transmission line method), C10-DNTT and DPh-DNTT perform quite similarly and notably better than DNTT, suggesting that the decyl substituents in C10-DNTT and the phenyl substituents in DPh-DNTT provide a similar level of enhancement of the charge-transport characteristics over DNTT. However, the DPh-DNTT TFTs have a substantially smaller contact resistance than both the DNTT and the C10-DNTT TFTs, resulting in notably larger effective mobilities, especially in transistors with very small channel lengths. For DPh-DNTT TFTs with a channel length of 1 μm, an effective mobility of 0.68 cm2/V was determined, together with an on/off ratio of 108 and a subthreshold swing of 100 mV/decade.  相似文献   
95.
The current study applied the lattice Boltzmann method to examine the effects of stacking chips layout to the micro-void formation in three-dimensional (3D) packaging. Three-dimensional 19-velocities commonly known as D3Q19 scheme is utilized in this study. Three different cases, which are different in layout design, are examined. For code verification purpose, an experimental work is also presented to compare the flow front results between numerical and experimental at different filling percentage. The numerical predictions compared well with the experimental results. Minor differences are observed in their flow front profile. The numerical findings identified the predicted locations of micro-void formation during the encapsulation process. The entrapment of micro-void was visualized clearly in the simulation because of the unbalanced molecular force at the interface during encapsulation. Knit lines were also identified at the interface between the flows that occurred in the encapsulation. Different layout of stacking flip-chips package have influence the micro-void in the package, which tended to form at the stacking chips region. The results show that the lattice Boltzmann method has a good performance in the IC encapsulation simulation.  相似文献   
96.
Techniques for enforcing the continuity of solute field in heterogeneous solvent under the conditions of steady temperature-humidity, steady temperature but dynamic humidity, and dynamic temperature are reviewed. The continuity of the wetness technique is justified on the principle of equality of chemical potential. The partial pressure technique is one of the many possible forms of pseudo techniques that can be derived from the wetness technique. The direct concentration technique is fundamentally flaw. The peridynamic technique in its original form is restricted to homogeneous solvent. The saturated concentration of solute in solvents decreases with increasing temperature; the rate of change with temperature differs between solvents and this leads to discontinuity of wetness along the interface of solvents. Continuity of wetness at the interface may be enforced using the intervention technique, the internal source technique, or the explicit finite difference scheme. These three techniques have been mutually validated in a reported study.  相似文献   
97.
Ion implantation followed by pulsed laser melting is an extensively-studied method for hyperdoping Si with impurity concentrations that exceed the equilibrium solubility limit by orders of magnitude. In the last decade, hyperdoped Si has attracted renewed interest for its potential as an intermediate band material. In this review, we first examine the important experimental results on both solid and liquid phase crystal regrowth from early laser annealing studies. The highly non-equilibrium regrowth kinetics following pulsed laser melting and its implications for dopant incorporation processes are discussed. We then review recent work in hyperdoped Si for enhanced sub-band gap photoresponse and give a brief discussion on photodetector device performance.  相似文献   
98.
With shrinking dimensions and increased number of on-chip transistors radiation can provoke faults in integrated circuits even at sea level. This paper presents a comparison of fully depleted SOI (FDSOI) and Bulk CMOS 6T SRAM cells' resilience to radiation effects. Both cells were simulated using TCAD tools, considering heavy-ion impacts in different locations of the transistor as well as using different impact angles. Two types of radiation effects have been considered: Single-Event Transients (SETs) and Single-Event Upsets (SEUs). The minimum critical collected charge (CC) to flip a cell is almost the same in both technologies. However, it is shown that a FDSOI SRAM cell needs a heavy-ion impact with a Linear Energy Transfer (LET) around 10 times greater than a Bulk-CMOS SRAM cell, to generate a similar CC and to flip a cell.  相似文献   
99.
本文关注高压IGBT动静态性能的优化。对4500V增强型平面IGBT进行研究,该结构在阴极一侧具有载流子存储层。其中垂直结构采用软穿通(SPT)结构,顶部结构采用增强型平面结构,该结构被称为SPT IGBT,仿真结果显示4500V SPT 具有软关断波形,与SPT结构相比提升了导通压降和关断损耗之间的折衷关系。同时,对不同载流子存储层掺杂浓度对动静态性能的影响也进行了研究,以此来优化SPT IGBT的动静态损耗。  相似文献   
100.
利用静电仪和HBM模型研究了GaN基LED外延片上芯片的抗静电性能,并根据pn结势垒电容的特性,对实验结果进行了分析.实验结果表明,缺陷击穿与外延片的工艺有着密切的关系;随着外延片上芯片尺寸的增大,其抗静电能力也随之增强.  相似文献   
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