The High Field Project at Dresden/Rossendorf: A Pulsed 100 T/10 ms Laboratory at an Infrared Free-Electron-Laser Facility

This article describes the project to build a pulsed magnetic field user laboratory at the Forschungszentrum Rossendorf near Dresden. Using a 50 MJ/24 kV capacitor bank, pulsed fields and rise times of 100 T/10 ms, 70 T/100 ms, and 60 T/1 s should be achieved. The laboratory will be built next to a free-electron-laser-facility for the middle and far infrared (5 to 150 µm, 2 ps, cw). We describe the work which has been performed until now to start the construction of the laboratory in 2003: coil concepts and computer simulations, materials development for the high field coils, and design of the capacitor bank modules. In addition, a pilot laboratory has been set up where fields up to 62 T/15 ms have been obtained with a 1 MJ/10 kV capacitor module. It is used to gain experience in the operation of such a facility and to test various parts of it. In this test laboratory special devices have been developed for measurements of magnetization and magnetoresistance, and have been successfully used to investigate various materials including semiconductors and Heavy Fermion compounds. In particular, metamagnetic transitions in intermetallic compounds and the irreversibility field of a high-T _c superconductor have been determined. Shubnikov–de Haas oscillations have been observed in the semimetallic compound CeBiPt. Resistance relaxation has been observed to start less than 1second after the field pulse. It could be shown for the first time that nuclear magnetic resonance (NMR) is detectable in pulsed fields.     

开关电流技术：一种新的模拟抽样数据处理方法

开关电流（ＳＩ）技术是一种新的模拟抽样数据处理技术，介绍了开关电流电路的基本单元结构，讨论了目前开关电流技术中存在的问题及其解决方法。对开关电流技术与开关电容技术的一些基本特征进行了比较，ＳＩ技术不仅结构简单，而且与标准ＣＭＯＳ工艺兼容，可望替代开关电容电路。     

片式阻容元件的现状和发展方向

在国外的片式元器件（ＳＭＤ）中，片式阻容元件发展最快，主要表现为片式化率迅速上升，尺寸越来越小，性能越来越好，包装形式多样化和生产管理不断改进。本文综述了国外阻容元件在这些方面的进展，指出了我国的差距，提出了我国如何发展的措施。     

氧化铝丝的研制

氧化铅丝生产过程中最关键的工艺是连续阳极氧化。氧化膜击穿电压决定于氧化膜厚度。控制膜厚度的三要素为:电解液(成份、浓度及温度),槽电压和铝丝走速。     

本征吸除硅片特性研究

本文描述硅本征吸杂片的特性参数,如吸除区宽度、洁净度,氧沉淀密度、MOS电容寿命,介绍了表面态密度及残余间隙氧浓度的检测方法和工艺对参数的影响及参数之间的内在联系,文章还实验论证了不同参数水平对器件成品率的影响,建立了以MOS电容寿命为主导的参数控制方法,利用本文提供的控制参数,可使CCD-512器件成品率达60％,以上优品率≥85％。     

Synthesizing Energy-Efficient Embedded Systems with LOPOCOS

In this paper, we introduce the LOPOCOS (Low Power Co-synthesis) system, a prototype CAD tool for system level co-design. LOPOCOS targets the design of energy-efficient embedded systems implemented as heterogeneous distributed architectures. In particular, it is designed to solve the specific problems involved in architectures that include dynamic voltage scalable (DVS) processors. The aim of this paper is to demonstrate how LOPOCOS can support the system designer in identifying energy-efficient hardware/software implementations for the desired embedded systems. Hence, highlighting the necessary optimization steps during design space exploration for DVS enable architectures. The optimization steps carried out in LOPOCOS involve component allocation and task/communication mapping as well as scheduling and dynamic voltage scaling. LOPOCOS has the following key features, which contribute to this energy efficiency. During the voltage scaling valuable power profile information of task execution is taken into account, hence, the accuracy of the energy estimation is improved. A combined optimization for scheduling and communication mapping based on genetic algorithm, optimizes simultaneously execution order and communication mapping towards the utilization of the DVS processors and timing behaviour. Furthermore, a separation of task and communication mapping allows a more effective implementation of both task and communication mapping optimizationsteps. Extensive experiments are conducted to demonstrate the efficiency of LOPOCOS. We report up to 38% higher energy reductions compared to previous co-synthesis techniques for DVS systems. The investigations include a real-life example of an optical flow detection algorithm.     

Determination of generation lifetime fromC-t transients under linear voltage ramp bias

When a linear voltage ramp is applied to the gate of a MOS capacitor, a capacitancetime (C-t) transient is observed. The MOS capacitor is biased into strong inversion before applying the voltage ramp in order to eliminate surface generation. FromC-t transient curve obtained experimentally the minority carrier generation lifetime in semiconductor can be determined. The experimental results show that for the same sample the lifetimes extracted fromC-t curves under varying voltage sweep rates are close each other, and they are consistent with the lifetimes extracted by saturation capacitance method.     

定电流对LED的重要性

高功率超高亮度LED已经开始大量应用.要实际体现LED(尤其是高功率超高亮度LED)的优点,采用定电流驱动方式必要条件之一.     

纵向零序电压保护新方案及其应用

由于结构设计的原因，综合性能较好的一些保护方案如横差保护和不完全纵差保护等将不能应用于大型超临界汽轮发电机。文中重点讨论了纵向零序电压保护方案的改进及其在应用中的问题。研究表明，发电机发生匝间短路故障时3次谐波电势减小，而机组外部故障时发电机3次谐波电势增大。因此，为了提高纵向零序电压保护方案的性能，可以根据故障时3次谐波电压增量的特性作为选取制动量的依据，从而提高保护性能。亦即:当3次谐波电压表现为负增量时，制动量取为0或接近0;而当3次谐波电压表现为正增量时，以该增量值作为制动量。此外，对匝间保护纵向零序电压元件增加一个小延时是可行的，它可以提高保护躲暂态3次谐波影响的能力。仿真计算表明，比例制动式纵向零序电压保护能可靠区分内外部故障，符合大型超临界汽轮发电机的保护要求。     

基于小波熵的电容器扰动识别和定位

对投电容器扰动识别和定位的方法进行了改进。针对其他此类方法的不足，比如在电压幅值低时投电容器扰动的识别、定位“可信度不高”等，文中通过提取小波变换的特定层的系数，对需要识别的电容器扰动的分解信号相对增强，而其他扰动的分解信号相对减弱，然后再提取熵特征值，结果表明它可以作为识别低电压时投电容器扰动的依据。在对电容器扰动进行定位时，参考了功率和能量定位法，并对其进行了改进。仿真分析证明，在电压幅值较低时，可以准确和可靠地对电容器扰动进行识别和定位。