A 340-GHz thin film polarisation converter

This paper introduces a 340-GHz polarisation converter. The polarisation converter consists of a bilayer metamaterial, which is processed by the flexible thin film lithography method. Two-dimensional metamaterial offer such advantages over traditional quarter-wave-plates as compactness, low profile and simple fabrication process, but the insertion loss is comparably high. In order to lower the insertion loss, the 10-μm ultrathin polyimide substrate and a bilayer structure separated by a quarter wavelength air impedance match layer are adopted. After the horn antenna’s far-field test by vector network analyser and the Gaussian beam test based on Terahertz time-domain spectroscopy (THz-TDS), the results show that in the band of 325–350 GHz, the transmission loss is less than 2 dB, and the axial ratio is less than 3 dB; besides, simulation and test insertion loss performance difference is less than 1 dB, which indicates that the method we adopt is effective. In addition, based on transmission line theory, we analyse its working principle and the influence from the fabrication error.     

不同负载条件下光伏接口MPPT变换器的小信号建模及实验验证

在分布式光伏发电系统中,光伏电池一般通过DC-DC变换器与后级相连,以实现输出最大功率跟踪（MPPT）.由于光伏电池的本质电流源特性,使得输入电压反馈控制光伏接口MPPT变换器为电流源变换器,会呈现出与常见电压源变换器截然不同的动态特性.以前置电容Boost变换器为研究对象,重点探讨电流源MPPT变换器的频率响应特性.首先,建立了开环和输入电压闭环两种控制方式下系统的小信号模型,并揭示不同负载类型对于系统频率响应的影响;其次,对MPPT变换器的端口阻抗进行了建模分析,指出影响闭环输入、输出阻抗特性的重要因素,为接口电路的后续稳定性设计提供理论指导;最后,搭建实验室电路样机,通过频域和时域测试结果验证了理论分析的正确性.     

A low-power rail-to-rail input-range linear delay element circuit

Delay elements are one of the key components in many time-domain circuits such as time-based analog-to-digital converters. In this paper, a new rail-to-rail current-starved delay element is proposed which not only presents good linearity for the voltage-delay curve over the input range of ground to supply voltage, but also it consumes a dynamic power only during the transition times without consuming any static power. The proposed delay element is designed and simulated in a 0.13-µm CMOS technology with a supply voltage of 1.2 V. Post-layout simulation results demonstrate that the proposed circuit has a linear voltage-delay transfer function with a voltage-to-time gain of −1.33 ps/mV. Moreover, when samples of a full-scale sin-wave input signal are applied to the proposed circuit with a clock frequency of 100 MHz, the power consumption is 30 µW, and signal-to-noise-and-distortion ratio (SNDR) of the output delay times is 30.4 dB, making it suitable for use in a time-based analog-to-digital converter with up to 5-bit resolution.     

Sigma-Delta ADC数字抽取滤波器的设计和实现

数字抽取滤波器是Sigma-Delta(Σ-Δ)模数转换器(ADC)的重要组成部分,它负责撞鄄驻调制器输出信号的滤波和抽取。文中设计的数字抽取滤波器由级联积分梳状(CIC)滤波器、CIC补偿滤波器和半带滤波器组成。首先,介绍Σ-Δ ADC原理;然后,讨论数字抽取滤波器的原理及实现;接着,分别从MATLAB和Verilog实现验证抽取滤波器的功能;最后,通过测试实际芯片验证数字抽取滤波器的功能和性能,满足设计要求。     

A COMPUTER-AIDED UNIFIED APPROACH TO MODELING PWM AND RESONANT CONVERTERS

This letter puts forward a method of modeling for the steady-state and small signal dynamic analysis on PWM, quasi-resonant and series/（parallel） resonant switching converters based on pulse-waveform integral approach. As an example, PWM and quasi-resonant converters are used to discuss the principle of the approach. The results are compared with those in the relative literatures. Computer aided analysis are made to confirm the correctness.     

一种0.18 μm CMOS 6位1.6 GHz闪烁型A/D转换器的设计

介绍了一种高速CMOS闪烁型(并行)A/D转换器的设计.采用分块化设计的方法,分别对各个模块的参数指标进行优化,并通过数字方法进行修正,实现了很高的信噪比.芯片的工作电压为1.8 V,最大采样率1.6 GHz,全速采样功耗210 mW,芯片有源区面积为0.75 mm×0.74 mm,采用TSMC 0.18 μm CMOS工艺实现.     

高阶Σ-Δ调制器的非理想特性分析与建模

文章对2-1-1级联结构的高阶Σ-Δ A/D调制器的非理想特性,包括时钟抖动、MOS开关噪声、比较器迟滞性、放大器的输入噪声、单位增益带宽和有限直流增益等,进行了分析,提出了基于Matlab的高层次建模方法.通过系统仿真确定关键的电路参数和性能指标,在较高层次指导A/D转换器的电路结构级和晶体管级设计.     

稀疏波长变换网络性能分析与研究

文章对动态业务模型下的稀疏波长变换网络性能进行了分析与研究，对波分复用（WDM）网络中引入波长变换器后的网络性能进行了系统的仿真，分析了波长变换器数量、波长变换器位置、波长变换范围以及路由波长算法等因素对网络性能的影响。     

一种采用0.5 μm CMOS工艺的多通道SAR ADC

设计并实现了一个多通道12位逐次逼近(SAR)A/D转换器。转换器内部集成了多路复用器和并行到串行转换寄存器、复合型DAC等。整体电路采用Hspice进行仿真,转换速率为133 ksps,转换时间为7.5μs。通过低功耗设计,工作电流降低为2.48 mA。芯片基于0.5μmCMOS工艺完成版图设计,版图面积为2.4 mm×2.3 mm,流片测试满足设计指标。     

光分组交换中的波长变换器配置研究

首先对波长变换器的功能及分类进行详细的论述,然后,对波长变换器的配置进行分析,总结出两种波长变换器配置方法,即独占式配置方法和共享式配置方法.针对独占式配置方法,本文使用仿真实验的方法研究了在不同类型的波长变换器下交换节点丢包性能的差异.本文还对独占式配置方法和共享式配置方法进行对比研究.